Searched refs:ckpxpll (Results 1 – 2 of 2) sorted by relevance
76 u32 ckpxpll = hdmi->mode.clock * 1000; in sti_hdmi_tx3g4c28phy_start() local81 DRM_DEBUG_DRIVER("ckpxpll = %dHz\n", ckpxpll); in sti_hdmi_tx3g4c28phy_start()84 if (ckpxpll >= plldividers[i].min && in sti_hdmi_tx3g4c28phy_start()85 ckpxpll < plldividers[i].max) { in sti_hdmi_tx3g4c28phy_start()95 ckpxpll); in sti_hdmi_tx3g4c28phy_start()100 tmdsck = ckpxpll; in sti_hdmi_tx3g4c28phy_start()
204 u32 ckpxpll = hdmi->mode.clock * 1000; in sti_hdmi_tx3g0c55phy_start() local211 DRM_DEBUG_DRIVER("ckpxpll = %dHz\n", ckpxpll); in sti_hdmi_tx3g0c55phy_start()214 tmdsck = ckpxpll; in sti_hdmi_tx3g0c55phy_start()224 if (ckpxpll >= pllmodes[i].min && ckpxpll <= pllmodes[i].max) in sti_hdmi_tx3g0c55phy_start()