Searched refs:cfg0 (Results 1 - 18 of 18) sorted by relevance

/linux-4.4.14/drivers/edac/
H A Docteon_edac-lmc.c41 union cvmx_lmcx_mem_cfg0 cfg0; octeon_lmc_edac_poll() local
45 cfg0.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mci->mc_idx)); octeon_lmc_edac_poll()
46 if (cfg0.s.sec_err || cfg0.s.ded_err) { octeon_lmc_edac_poll()
55 if (cfg0.s.sec_err) { octeon_lmc_edac_poll()
58 cfg0.s.sec_err = -1; /* Done, re-arm */ octeon_lmc_edac_poll()
62 if (cfg0.s.ded_err) { octeon_lmc_edac_poll()
65 cfg0.s.ded_err = -1; /* Done, re-arm */ octeon_lmc_edac_poll()
69 cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mci->mc_idx), cfg0.u64); octeon_lmc_edac_poll()
238 union cvmx_lmcx_mem_cfg0 cfg0; octeon_lmc_edac_probe() local
240 cfg0.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(0)); octeon_lmc_edac_probe()
241 if (!cfg0.s.ecc_ena) { octeon_lmc_edac_probe()
263 cfg0.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mc)); octeon_lmc_edac_probe()
264 cfg0.s.intr_ded_ena = 0; /* We poll */ octeon_lmc_edac_probe()
265 cfg0.s.intr_sec_ena = 0; octeon_lmc_edac_probe()
266 cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mc), cfg0.u64); octeon_lmc_edac_probe()
/linux-4.4.14/arch/mips/lasat/
H A Dlasat_board.c97 unsigned long cfg0, cfg1; lasat_init_board_info() local
125 cfg0 = lasat_board_info.li_eeprom_info.cfg[0]; lasat_init_board_info()
128 if (LASAT_W0_DSCTYPE(cfg0) != 1) { lasat_init_board_info()
135 switch (LASAT_W0_SDRAMBANKSZ(cfg0)) { lasat_init_board_info()
155 switch (LASAT_W0_SDRAMBANKS(cfg0)) { lasat_init_board_info()
165 switch (LASAT_W0_BUSSPEED(cfg0)) { lasat_init_board_info()
186 switch (LASAT_W0_CPUCLK(cfg0)) { lasat_init_board_info()
236 lasat_board_info.li_bmid = LASAT_W0_BMID(cfg0); lasat_init_board_info()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramnv10.c31 u32 cfg0 = nvkm_rd32(device, 0x100200); nv10_ram_new() local
34 if (cfg0 & 0x00000001) nv10_ram_new()
/linux-4.4.14/drivers/clk/zte/
H A Dclk.h17 u32 cfg0; member in struct:zx_pll_config
H A Dclk-zx296702.c56 { .rate = 700000000, .cfg0 = 0x800405d1, .cfg1 = 0x04555555 },
57 { .rate = 800000000, .cfg0 = 0x80040691, .cfg1 = 0x04aaaaaa },
58 { .rate = 900000000, .cfg0 = 0x80040791, .cfg1 = 0x04000000 },
59 { .rate = 1000000000, .cfg0 = 0x80040851, .cfg1 = 0x04555555 },
60 { .rate = 1100000000, .cfg0 = 0x80040911, .cfg1 = 0x04aaaaaa },
61 { .rate = 1200000000, .cfg0 = 0x80040a11, .cfg1 = 0x04000000 },
H A Dclk.c57 if (hw_cfg0 == config[i].cfg0 && hw_cfg1 == config[i].cfg1) hw_to_idx()
99 writel_relaxed(config->cfg0, zx_pll->reg_base); zx_pll_set_rate()
/linux-4.4.14/arch/sparc/include/asm/
H A Dsbi.h19 /* 0x0010 */ u32 cfg0; /* Slot0 config reg */ member in struct:sbi_regs
/linux-4.4.14/drivers/net/phy/
H A Ddp83640.c119 /* remember state of cfg0 during calibration */
120 int cfg0; member in struct:dp83640_private
540 u16 cfg0 = 0, ver; enable_status_frames() local
543 cfg0 = PSF_EVNT_EN | PSF_RXTS_EN | PSF_TXTS_EN | ENDIAN_FLAG; enable_status_frames()
549 ext_write(0, phydev, PAGE5, PSF_CFG0, cfg0); enable_status_frames()
622 u16 cal_gpio, cfg0, evnt, ptp_trig, trigger, val; recalibrate() local
639 tmp->cfg0 = ext_read(tmp->phydev, PAGE5, PSF_CFG0); recalibrate()
644 cfg0 = ext_read(master, PAGE5, PSF_CFG0); recalibrate()
719 ext_write(0, tmp->phydev, PAGE5, PSF_CFG0, tmp->cfg0); recalibrate()
721 ext_write(0, master, PAGE5, PSF_CFG0, cfg0); recalibrate()
/linux-4.4.14/arch/mips/ralink/
H A Dmt7620.c519 u32 cfg0; prom_soc_init() local
560 cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0); prom_soc_init()
562 dram_type = cfg0 & DRAM_TYPE_MT7628_MASK; prom_soc_init()
564 dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & prom_soc_init()
/linux-4.4.14/drivers/gpu/drm/exynos/
H A Dexynos_drm_fimc.c1441 u32 cfg0, cfg1; fimc_ippdrv_start() local
1478 cfg0 = fimc_read(ctx, EXYNOS_MSCTRL);
1479 cfg0 &= ~EXYNOS_MSCTRL_INPUT_MASK;
1480 cfg0 |= EXYNOS_MSCTRL_INPUT_MEMORY;
1481 fimc_write(ctx, cfg0, EXYNOS_MSCTRL);
1508 cfg0 = fimc_read(ctx, EXYNOS_CIIMGCPT);
1509 cfg0 &= ~EXYNOS_CIIMGCPT_IMGCPTEN_SC;
1510 cfg0 |= EXYNOS_CIIMGCPT_IMGCPTEN_SC;
1521 cfg0 |= EXYNOS_CIIMGCPT_IMGCPTEN;
1522 fimc_write(ctx, cfg0, EXYNOS_CIIMGCPT);
/linux-4.4.14/drivers/clk/sirf/
H A Dclk-common.c87 u32 cfg0 = clkc_readl(clk->regofs); pll_clk_recalc_rate() local
88 u32 nf = (cfg0 & (BIT(13) - 1)) + 1; pll_clk_recalc_rate()
89 u32 nr = ((cfg0 >> 13) & (BIT(6) - 1)) + 1; pll_clk_recalc_rate()
90 u32 od = ((cfg0 >> 19) & (BIT(4) - 1)) + 1; pll_clk_recalc_rate()
/linux-4.4.14/sound/pci/au88x0/
H A Dau88x0_core.c1108 dma->cfg0 = 0; vortex_adbdma_setbuffers()
1120 dma->cfg0 |= 0x12000000; vortex_adbdma_setbuffers()
1127 dma->cfg0 |= 0x88000000 | 0x44000000 | 0x10000000 | (psize - 1); vortex_adbdma_setbuffers()
1133 dma->cfg0 |= 0x80000000 | 0x40000000 | ((psize - 1) << 0xc); vortex_adbdma_setbuffers()
1140 pr_debug( "vortex: cfg0 = 0x%x\nvortex: cfg1=0x%x\n", vortex_adbdma_setbuffers()
1141 dma->cfg0, dma->cfg1); vortex_adbdma_setbuffers()
1143 hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFCFG0 + (adbdma << 3), dma->cfg0); vortex_adbdma_setbuffers()
1384 dma->cfg0 = 0; vortex_wtdma_setbuffers()
1395 dma->cfg0 |= 0x12000000; vortex_wtdma_setbuffers()
1401 dma->cfg0 |= 0x88000000 | 0x44000000 | 0x10000000 | (psize-1); vortex_wtdma_setbuffers()
1406 dma->cfg0 |= 0x80000000 | 0x40000000 | ((psize-1) << 0xc); vortex_wtdma_setbuffers()
1411 hwwrite(vortex->mmio, VORTEX_WTDMA_BUFCFG0 + (wtdma << 3), dma->cfg0); vortex_wtdma_setbuffers()
H A Dau88x0.h123 int cfg0; member in struct:__anon15303
/linux-4.4.14/drivers/pinctrl/intel/
H A Dpinctrl-intel.c249 u32 cfg0, cfg1, mode; intel_pin_dbg_show() local
257 cfg0 = readl(intel_get_padcfg(pctrl, pin, PADCFG0)); intel_pin_dbg_show()
260 mode = (cfg0 & PADCFG0_PMODE_MASK) >> PADCFG0_PMODE_SHIFT; intel_pin_dbg_show()
266 seq_printf(s, "0x%08x 0x%08x", cfg0, cfg1); intel_pin_dbg_show()
/linux-4.4.14/drivers/pinctrl/
H A Dpinctrl-st.c62 * There are two registers cfg0 and cfg1 in this style for each bank.
1110 /* cfg0 */ st_pctl_dt_setup_retime_packed()
/linux-4.4.14/drivers/scsi/
H A Ddc395x.c196 u8 cfg0; /* Target configuration byte 0 */ member in struct:NVRamTarget
683 eeprom->target[id].cfg0 = eeprom_override()
1284 dcb->dev_mode = eeprom->target[dcb->target_id].cfg0; reset_dev_param()
3750 dcb->dev_mode = eeprom->target[target].cfg0; device_alloc()
4201 *d_eeprom = 0x00000077; /* cfg3,cfg2,period,cfg0 */ check_eeprom()
4242 eeprom->target[0].cfg0); print_eeprom_settings()
/linux-4.4.14/drivers/media/dvb-frontends/
H A Ddib7000m.c415 dib7000m_write_word(state, 907, reg_907); // clk cfg0 dib7000m_reset_pll()
/linux-4.4.14/drivers/hwmon/
H A Dadt7462.c77 #define ADT7462_PIN7_INPUT 0x01 /* cfg0 */

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