Searched refs:ccm (Results 1 - 36 of 36) sorted by relevance

/linux-4.4.14/drivers/clk/imx/
H A Dclk-imx25.c54 #define ccm(x) (ccm_base + (x)) macro
106 clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "mpll", "osc", ccm(CCM_MPCTL)); __mx25_clocks_init()
107 clk[upll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "upll", "osc", ccm(CCM_UPCTL)); __mx25_clocks_init()
109 clk[cpu_sel] = imx_clk_mux("cpu_sel", ccm(CCM_CCTL), 14, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks)); __mx25_clocks_init()
110 clk[cpu] = imx_clk_divider("cpu", "cpu_sel", ccm(CCM_CCTL), 30, 2); __mx25_clocks_init()
111 clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2); __mx25_clocks_init()
112 clk[usb_div] = imx_clk_divider("usb_div", "upll", ccm(CCM_CCTL), 16, 6); __mx25_clocks_init()
114 clk[per0_sel] = imx_clk_mux("per0_sel", ccm(CCM_MCR), 0, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
115 clk[per1_sel] = imx_clk_mux("per1_sel", ccm(CCM_MCR), 1, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
116 clk[per2_sel] = imx_clk_mux("per2_sel", ccm(CCM_MCR), 2, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
117 clk[per3_sel] = imx_clk_mux("per3_sel", ccm(CCM_MCR), 3, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
118 clk[per4_sel] = imx_clk_mux("per4_sel", ccm(CCM_MCR), 4, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
119 clk[per5_sel] = imx_clk_mux("per5_sel", ccm(CCM_MCR), 5, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
120 clk[per6_sel] = imx_clk_mux("per6_sel", ccm(CCM_MCR), 6, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
121 clk[per7_sel] = imx_clk_mux("per7_sel", ccm(CCM_MCR), 7, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
122 clk[per8_sel] = imx_clk_mux("per8_sel", ccm(CCM_MCR), 8, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
123 clk[per9_sel] = imx_clk_mux("per9_sel", ccm(CCM_MCR), 9, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
124 clk[per10_sel] = imx_clk_mux("per10_sel", ccm(CCM_MCR), 10, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
125 clk[per11_sel] = imx_clk_mux("per11_sel", ccm(CCM_MCR), 11, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
126 clk[per12_sel] = imx_clk_mux("per12_sel", ccm(CCM_MCR), 12, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
127 clk[per13_sel] = imx_clk_mux("per13_sel", ccm(CCM_MCR), 13, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
128 clk[per14_sel] = imx_clk_mux("per14_sel", ccm(CCM_MCR), 14, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
129 clk[per15_sel] = imx_clk_mux("per15_sel", ccm(CCM_MCR), 15, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); __mx25_clocks_init()
130 clk[cko_div] = imx_clk_divider("cko_div", "cko_sel", ccm(CCM_MCR), 24, 6); __mx25_clocks_init()
131 clk[cko_sel] = imx_clk_mux("cko_sel", ccm(CCM_MCR), 20, 4, cko_sel_clks, ARRAY_SIZE(cko_sel_clks)); __mx25_clocks_init()
132 clk[cko] = imx_clk_gate("cko", "cko_div", ccm(CCM_MCR), 30); __mx25_clocks_init()
133 clk[per0] = imx_clk_divider("per0", "per0_sel", ccm(CCM_PCDR0), 0, 6); __mx25_clocks_init()
134 clk[per1] = imx_clk_divider("per1", "per1_sel", ccm(CCM_PCDR0), 8, 6); __mx25_clocks_init()
135 clk[per2] = imx_clk_divider("per2", "per2_sel", ccm(CCM_PCDR0), 16, 6); __mx25_clocks_init()
136 clk[per3] = imx_clk_divider("per3", "per3_sel", ccm(CCM_PCDR0), 24, 6); __mx25_clocks_init()
137 clk[per4] = imx_clk_divider("per4", "per4_sel", ccm(CCM_PCDR1), 0, 6); __mx25_clocks_init()
138 clk[per5] = imx_clk_divider("per5", "per5_sel", ccm(CCM_PCDR1), 8, 6); __mx25_clocks_init()
139 clk[per6] = imx_clk_divider("per6", "per6_sel", ccm(CCM_PCDR1), 16, 6); __mx25_clocks_init()
140 clk[per7] = imx_clk_divider("per7", "per7_sel", ccm(CCM_PCDR1), 24, 6); __mx25_clocks_init()
141 clk[per8] = imx_clk_divider("per8", "per8_sel", ccm(CCM_PCDR2), 0, 6); __mx25_clocks_init()
142 clk[per9] = imx_clk_divider("per9", "per9_sel", ccm(CCM_PCDR2), 8, 6); __mx25_clocks_init()
143 clk[per10] = imx_clk_divider("per10", "per10_sel", ccm(CCM_PCDR2), 16, 6); __mx25_clocks_init()
144 clk[per11] = imx_clk_divider("per11", "per11_sel", ccm(CCM_PCDR2), 24, 6); __mx25_clocks_init()
145 clk[per12] = imx_clk_divider("per12", "per12_sel", ccm(CCM_PCDR3), 0, 6); __mx25_clocks_init()
146 clk[per13] = imx_clk_divider("per13", "per13_sel", ccm(CCM_PCDR3), 8, 6); __mx25_clocks_init()
147 clk[per14] = imx_clk_divider("per14", "per14_sel", ccm(CCM_PCDR3), 16, 6); __mx25_clocks_init()
148 clk[per15] = imx_clk_divider("per15", "per15_sel", ccm(CCM_PCDR3), 24, 6); __mx25_clocks_init()
149 clk[csi_ipg_per] = imx_clk_gate("csi_ipg_per", "per0", ccm(CCM_CGCR0), 0); __mx25_clocks_init()
150 clk[epit_ipg_per] = imx_clk_gate("epit_ipg_per", "per1", ccm(CCM_CGCR0), 1); __mx25_clocks_init()
151 clk[esai_ipg_per] = imx_clk_gate("esai_ipg_per", "per2", ccm(CCM_CGCR0), 2); __mx25_clocks_init()
152 clk[esdhc1_ipg_per] = imx_clk_gate("esdhc1_ipg_per", "per3", ccm(CCM_CGCR0), 3); __mx25_clocks_init()
153 clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4); __mx25_clocks_init()
154 clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5); __mx25_clocks_init()
155 clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6); __mx25_clocks_init()
156 clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0), 7); __mx25_clocks_init()
157 clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0), 8); __mx25_clocks_init()
158 clk[owire_ipg_per] = imx_clk_gate("owire_ipg_per", "per9", ccm(CCM_CGCR0), 9); __mx25_clocks_init()
159 clk[pwm_ipg_per] = imx_clk_gate("pwm_ipg_per", "per10", ccm(CCM_CGCR0), 10); __mx25_clocks_init()
160 clk[sim1_ipg_per] = imx_clk_gate("sim1_ipg_per", "per11", ccm(CCM_CGCR0), 11); __mx25_clocks_init()
161 clk[sim2_ipg_per] = imx_clk_gate("sim2_ipg_per", "per12", ccm(CCM_CGCR0), 12); __mx25_clocks_init()
162 clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13); __mx25_clocks_init()
163 clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14); __mx25_clocks_init()
164 clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15); __mx25_clocks_init()
165 clk[ata_ahb] = imx_clk_gate("ata_ahb", "ahb", ccm(CCM_CGCR0), 16); __mx25_clocks_init()
167 clk[csi_ahb] = imx_clk_gate("csi_ahb", "ahb", ccm(CCM_CGCR0), 18); __mx25_clocks_init()
168 clk[emi_ahb] = imx_clk_gate("emi_ahb", "ahb", ccm(CCM_CGCR0), 19); __mx25_clocks_init()
169 clk[esai_ahb] = imx_clk_gate("esai_ahb", "ahb", ccm(CCM_CGCR0), 20); __mx25_clocks_init()
170 clk[esdhc1_ahb] = imx_clk_gate("esdhc1_ahb", "ahb", ccm(CCM_CGCR0), 21); __mx25_clocks_init()
171 clk[esdhc2_ahb] = imx_clk_gate("esdhc2_ahb", "ahb", ccm(CCM_CGCR0), 22); __mx25_clocks_init()
172 clk[fec_ahb] = imx_clk_gate("fec_ahb", "ahb", ccm(CCM_CGCR0), 23); __mx25_clocks_init()
173 clk[lcdc_ahb] = imx_clk_gate("lcdc_ahb", "ahb", ccm(CCM_CGCR0), 24); __mx25_clocks_init()
174 clk[rtic_ahb] = imx_clk_gate("rtic_ahb", "ahb", ccm(CCM_CGCR0), 25); __mx25_clocks_init()
175 clk[sdma_ahb] = imx_clk_gate("sdma_ahb", "ahb", ccm(CCM_CGCR0), 26); __mx25_clocks_init()
176 clk[slcdc_ahb] = imx_clk_gate("slcdc_ahb", "ahb", ccm(CCM_CGCR0), 27); __mx25_clocks_init()
177 clk[usbotg_ahb] = imx_clk_gate("usbotg_ahb", "ahb", ccm(CCM_CGCR0), 28); __mx25_clocks_init()
180 clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1), 2); __mx25_clocks_init()
181 clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1), 3); __mx25_clocks_init()
182 clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1), 4); __mx25_clocks_init()
183 clk[cspi1_ipg] = imx_clk_gate("cspi1_ipg", "ipg", ccm(CCM_CGCR1), 5); __mx25_clocks_init()
184 clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1), 6); __mx25_clocks_init()
185 clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", ccm(CCM_CGCR1), 7); __mx25_clocks_init()
186 clk[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", ccm(CCM_CGCR1), 8); __mx25_clocks_init()
187 clk[ect_ipg] = imx_clk_gate("ect_ipg", "ipg", ccm(CCM_CGCR1), 9); __mx25_clocks_init()
188 clk[epit1_ipg] = imx_clk_gate("epit1_ipg", "ipg", ccm(CCM_CGCR1), 10); __mx25_clocks_init()
189 clk[epit2_ipg] = imx_clk_gate("epit2_ipg", "ipg", ccm(CCM_CGCR1), 11); __mx25_clocks_init()
191 clk[esdhc1_ipg] = imx_clk_gate("esdhc1_ipg", "ipg", ccm(CCM_CGCR1), 13); __mx25_clocks_init()
192 clk[esdhc2_ipg] = imx_clk_gate("esdhc2_ipg", "ipg", ccm(CCM_CGCR1), 14); __mx25_clocks_init()
193 clk[fec_ipg] = imx_clk_gate("fec_ipg", "ipg", ccm(CCM_CGCR1), 15); __mx25_clocks_init()
197 clk[gpt1_ipg] = imx_clk_gate("gpt1_ipg", "ipg", ccm(CCM_CGCR1), 19); __mx25_clocks_init()
198 clk[gpt2_ipg] = imx_clk_gate("gpt2_ipg", "ipg", ccm(CCM_CGCR1), 20); __mx25_clocks_init()
199 clk[gpt3_ipg] = imx_clk_gate("gpt3_ipg", "ipg", ccm(CCM_CGCR1), 21); __mx25_clocks_init()
200 clk[gpt4_ipg] = imx_clk_gate("gpt4_ipg", "ipg", ccm(CCM_CGCR1), 22); __mx25_clocks_init()
204 clk[iim_ipg] = imx_clk_gate("iim_ipg", "ipg", ccm(CCM_CGCR1), 26); __mx25_clocks_init()
207 clk[kpp_ipg] = imx_clk_gate("kpp_ipg", "ipg", ccm(CCM_CGCR1), 28); __mx25_clocks_init()
208 clk[lcdc_ipg] = imx_clk_gate("lcdc_ipg", "ipg", ccm(CCM_CGCR1), 29); __mx25_clocks_init()
210 clk[pwm1_ipg] = imx_clk_gate("pwm1_ipg", "ipg", ccm(CCM_CGCR1), 31); __mx25_clocks_init()
211 clk[pwm2_ipg] = imx_clk_gate("pwm2_ipg", "ipg", ccm(CCM_CGCR2), 0); __mx25_clocks_init()
212 clk[pwm3_ipg] = imx_clk_gate("pwm3_ipg", "ipg", ccm(CCM_CGCR2), 1); __mx25_clocks_init()
213 clk[pwm4_ipg] = imx_clk_gate("pwm4_ipg", "ipg", ccm(CCM_CGCR2), 2); __mx25_clocks_init()
214 clk[rngb_ipg] = imx_clk_gate("rngb_ipg", "ipg", ccm(CCM_CGCR2), 3); __mx25_clocks_init()
216 clk[scc_ipg] = imx_clk_gate("scc_ipg", "ipg", ccm(CCM_CGCR2), 5); __mx25_clocks_init()
217 clk[sdma_ipg] = imx_clk_gate("sdma_ipg", "ipg", ccm(CCM_CGCR2), 6); __mx25_clocks_init()
218 clk[sim1_ipg] = imx_clk_gate("sim1_ipg", "ipg", ccm(CCM_CGCR2), 7); __mx25_clocks_init()
219 clk[sim2_ipg] = imx_clk_gate("sim2_ipg", "ipg", ccm(CCM_CGCR2), 8); __mx25_clocks_init()
220 clk[slcdc_ipg] = imx_clk_gate("slcdc_ipg", "ipg", ccm(CCM_CGCR2), 9); __mx25_clocks_init()
221 clk[spba_ipg] = imx_clk_gate("spba_ipg", "ipg", ccm(CCM_CGCR2), 10); __mx25_clocks_init()
222 clk[ssi1_ipg] = imx_clk_gate("ssi1_ipg", "ipg", ccm(CCM_CGCR2), 11); __mx25_clocks_init()
223 clk[ssi2_ipg] = imx_clk_gate("ssi2_ipg", "ipg", ccm(CCM_CGCR2), 12); __mx25_clocks_init()
224 clk[tsc_ipg] = imx_clk_gate("tsc_ipg", "ipg", ccm(CCM_CGCR2), 13); __mx25_clocks_init()
225 clk[uart1_ipg] = imx_clk_gate("uart1_ipg", "ipg", ccm(CCM_CGCR2), 14); __mx25_clocks_init()
226 clk[uart2_ipg] = imx_clk_gate("uart2_ipg", "ipg", ccm(CCM_CGCR2), 15); __mx25_clocks_init()
227 clk[uart3_ipg] = imx_clk_gate("uart3_ipg", "ipg", ccm(CCM_CGCR2), 16); __mx25_clocks_init()
228 clk[uart4_ipg] = imx_clk_gate("uart4_ipg", "ipg", ccm(CCM_CGCR2), 17); __mx25_clocks_init()
229 clk[uart5_ipg] = imx_clk_gate("uart5_ipg", "ipg", ccm(CCM_CGCR2), 18); __mx25_clocks_init()
231 clk[wdt_ipg] = imx_clk_gate("wdt_ipg", "ipg", ccm(CCM_CGCR2), 19); __mx25_clocks_init()
255 void __iomem *ccm; mx25_clocks_init_dt() local
267 ccm = of_iomap(np, 0); mx25_clocks_init_dt()
268 __mx25_clocks_init(osc_rate, ccm); mx25_clocks_init_dt()
274 CLK_OF_DECLARE(imx25_ccm, "fsl,imx25-ccm", mx25_clocks_init_dt);
H A Dclk-imx1.c41 static void __iomem *ccm __initdata;
42 #define CCM_CSCR (ccm + 0x0000)
43 #define CCM_MPCTL0 (ccm + 0x0004)
44 #define CCM_SPCTL0 (ccm + 0x000c)
45 #define CCM_PCDR (ccm + 0x0020)
46 #define SCM_GCCR (ccm + 0x0810)
81 ccm = ioremap(MX1_CCM_BASE_ADDR, SZ_4K); mx1_clocks_init()
82 BUG_ON(!ccm); mx1_clocks_init()
112 ccm = of_iomap(np, 0); mx1_clocks_init_dt()
113 BUG_ON(!ccm); mx1_clocks_init_dt()
121 CLK_OF_DECLARE(imx1_ccm, "fsl,imx1-ccm", mx1_clocks_init_dt);
H A Dclk-imx21.c26 static void __iomem *ccm __initdata;
29 #define CCM_CSCR (ccm + 0x00)
30 #define CCM_MPCTL0 (ccm + 0x04)
31 #define CCM_SPCTL0 (ccm + 0x0c)
32 #define CCM_PCDR0 (ccm + 0x18)
33 #define CCM_PCDR1 (ccm + 0x1c)
34 #define CCM_PCCR0 (ccm + 0x20)
35 #define CCM_PCCR1 (ccm + 0x24)
47 BUG_ON(!ccm); _mx21_clocks_init()
127 ccm = ioremap(MX21_CCM_BASE_ADDR, SZ_2K); mx21_clocks_init()
166 ccm = of_iomap(np, 0); mx21_clocks_init_dt()
174 CLK_OF_DECLARE(imx27_ccm, "fsl,imx21-ccm", mx21_clocks_init_dt);
H A Dclk-imx27.c18 static void __iomem *ccm __initdata;
21 #define CCM_CSCR (ccm + 0x00)
22 #define CCM_MPCTL0 (ccm + 0x04)
23 #define CCM_MPCTL1 (ccm + 0x08)
24 #define CCM_SPCTL0 (ccm + 0x0c)
25 #define CCM_SPCTL1 (ccm + 0x10)
26 #define CCM_PCDR0 (ccm + 0x18)
27 #define CCM_PCDR1 (ccm + 0x1c)
28 #define CCM_PCCR0 (ccm + 0x20)
29 #define CCM_PCCR1 (ccm + 0x24)
30 #define CCM_CCSR (ccm + 0x28)
63 BUG_ON(!ccm); _mx27_clocks_init()
184 ccm = ioremap(MX27_CCM_BASE_ADDR, SZ_4K); mx27_clocks_init()
270 ccm = of_iomap(np, 0); mx27_clocks_init_dt()
278 CLK_OF_DECLARE(imx27_ccm, "fsl,imx27-ccm", mx27_clocks_init_dt);
H A Dclk-imx51-imx53.c391 CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init);
480 CLK_OF_DECLARE(imx51_ccm, "fsl,imx51-ccm", mx51_clocks_init);
586 CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init);
H A Dclk-imx31.c151 np = of_find_compatible_node(NULL, NULL, "fsl,imx31-ccm"); _mx31_clocks_init()
H A Dclk-imx35.c329 CLK_OF_DECLARE(imx35, "fsl,imx35-ccm", mx35_clocks_init_dt);
H A Dclk-imx6sl.c453 CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);
H A Dclk-imx6ul.c450 CLK_OF_DECLARE(imx6ul, "fsl,imx6ul-ccm", imx6ul_clocks_init);
H A Dclk-vf610.c417 CLK_OF_DECLARE(vf610, "fsl,vf610-ccm", vf610_clocks_init);
H A Dclk-imx6q.c555 CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);
H A Dclk-imx6sx.c570 CLK_OF_DECLARE(imx6sx, "fsl,imx6sx-ccm", imx6sx_clocks_init);
H A Dclk-imx7d.c874 CLK_OF_DECLARE(imx7d, "fsl,imx7d-ccm", imx7d_clocks_init);
/linux-4.4.14/arch/arm64/crypto/
H A DMakefile23 obj-$(CONFIG_CRYPTO_AES_ARM64_CE_CCM) += aes-ce-ccm.o
24 aes-ce-ccm-y := aes-ce-ccm-glue.o aes-ce-ccm-core.o
H A Daes-ce-ccm-glue.c2 * aes-ccm-glue.c - AES-CCM transform for ARMv8 with Crypto Extensions
281 .cra_name = "ccm(aes)",
282 .cra_driver_name = "ccm-aes-ce",
315 MODULE_ALIAS_CRYPTO("ccm(aes)");
/linux-4.4.14/drivers/crypto/nx/
H A DMakefile7 nx-aes-ccm.o \
H A Dnx-aes-ccm.c76 memcpy(nx_ctx->priv.ccm.nonce, in_key + key_len, 3); ccm4309_aes_nx_set_key()
115 /* taken from crypto/ccm.c */ set_msg_len()
134 /* taken from crypto/ccm.c */ crypto_ccm_check_iv()
144 /* based on code from crypto/ccm.c */ generate_b0()
207 b1 = nx_ctx->priv.ccm.iauth_tag; generate_pat()
349 struct nx_ccm_priv *priv = &nx_ctx->priv.ccm; ccm_nx_decrypt()
500 memcpy(iv + 1, nx_ctx->priv.ccm.nonce, 3); ccm4309_aes_nx_encrypt()
530 memcpy(iv + 1, nx_ctx->priv.ccm.nonce, 3); ccm4309_aes_nx_decrypt()
559 .cra_name = "ccm(aes)",
560 .cra_driver_name = "ccm-aes-nx",
579 .cra_name = "rfc4309(ccm(aes))",
580 .cra_driver_name = "rfc4309-ccm-aes-nx",
H A Dnx.h146 struct nx_ccm_priv ccm; member in union:nx_crypto_ctx::__anon3853
/linux-4.4.14/drivers/power/
H A Dabx500_chargalg.c223 * @ccm charging current maximization parameters
249 struct abx500_charge_curr_maximization ccm; member in struct:abx500_chargalg
857 di->ccm.original_iset = init_maxim_chg_curr()
859 di->ccm.current_iset = init_maxim_chg_curr()
861 di->ccm.test_delta_i = di->bm->maxi->charger_curr_step; init_maxim_chg_curr()
862 di->ccm.max_current = di->bm->maxi->chg_curr; init_maxim_chg_curr()
863 di->ccm.condition_cnt = di->bm->maxi->wait_cycles; init_maxim_chg_curr()
864 di->ccm.level = 0; init_maxim_chg_curr()
883 delta_i = di->ccm.original_iset - di->batt_data.inst_curr; abx500_chargalg_chg_curr_maxim()
887 di->ccm.wait_cnt); abx500_chargalg_chg_curr_maxim()
888 if (di->ccm.wait_cnt == 0) { abx500_chargalg_chg_curr_maxim()
890 di->ccm.wait_cnt++; abx500_chargalg_chg_curr_maxim()
891 di->ccm.condition_cnt = di->bm->maxi->wait_cycles; abx500_chargalg_chg_curr_maxim()
892 di->ccm.max_current = abx500_chargalg_chg_curr_maxim()
893 di->ccm.current_iset - di->ccm.test_delta_i; abx500_chargalg_chg_curr_maxim()
894 di->ccm.current_iset = di->ccm.max_current; abx500_chargalg_chg_curr_maxim()
895 di->ccm.level--; abx500_chargalg_chg_curr_maxim()
900 di->ccm.wait_cnt = (di->ccm.wait_cnt + 1) % 3; abx500_chargalg_chg_curr_maxim()
905 di->ccm.wait_cnt = 0; abx500_chargalg_chg_curr_maxim()
907 if ((di->batt_data.inst_curr > di->ccm.original_iset)) { abx500_chargalg_chg_curr_maxim()
910 di->batt_data.inst_curr, di->ccm.original_iset, abx500_chargalg_chg_curr_maxim()
911 di->ccm.current_iset); abx500_chargalg_chg_curr_maxim()
913 if (di->ccm.current_iset == di->ccm.original_iset) abx500_chargalg_chg_curr_maxim()
916 di->ccm.condition_cnt = di->bm->maxi->wait_cycles; abx500_chargalg_chg_curr_maxim()
917 di->ccm.current_iset = di->ccm.original_iset; abx500_chargalg_chg_curr_maxim()
918 di->ccm.level = 0; abx500_chargalg_chg_curr_maxim()
923 if (delta_i > di->ccm.test_delta_i && abx500_chargalg_chg_curr_maxim()
924 (di->ccm.current_iset + di->ccm.test_delta_i) < abx500_chargalg_chg_curr_maxim()
925 di->ccm.max_current) { abx500_chargalg_chg_curr_maxim()
926 if (di->ccm.condition_cnt-- == 0) { abx500_chargalg_chg_curr_maxim()
928 di->ccm.condition_cnt = di->bm->maxi->wait_cycles; abx500_chargalg_chg_curr_maxim()
929 di->ccm.current_iset += di->ccm.test_delta_i; abx500_chargalg_chg_curr_maxim()
930 di->ccm.level++; abx500_chargalg_chg_curr_maxim()
934 di->ccm.test_delta_i, abx500_chargalg_chg_curr_maxim()
935 di->ccm.current_iset, abx500_chargalg_chg_curr_maxim()
936 di->ccm.original_iset, abx500_chargalg_chg_curr_maxim()
937 di->ccm.level); abx500_chargalg_chg_curr_maxim()
943 di->ccm.condition_cnt = di->bm->maxi->wait_cycles; abx500_chargalg_chg_curr_maxim()
957 di->ccm.current_iset); handle_maxim_chg_curr()
/linux-4.4.14/arch/arm/mach-imx/
H A Dmach-imx6sl.c69 imx6_pm_ccm_init("fsl,imx6sl-ccm"); imx6sl_init_irq()
H A Dmach-imx6sx.c89 imx6_pm_ccm_init("fsl,imx6sx-ccm"); imx6sx_init_irq()
H A Dmach-imx6ul.c78 imx6_pm_ccm_init("fsl,imx6ul-ccm"); imx6ul_init_irq()
H A Dpm-imx6.c506 * ccm physical address is not used by asm code currently, imx6q_suspend_init()
507 * so get ccm virtual address directly. imx6q_suspend_init()
H A Dmach-imx6q.c396 imx6_pm_ccm_init("fsl,imx6q-ccm"); imx6q_init_irq()
/linux-4.4.14/net/mac80211/
H A Daes_ccm.c80 tfm = crypto_alloc_aead("ccm(aes)", 0, CRYPTO_ALG_ASYNC); ieee80211_aes_key_setup_encrypt()
/linux-4.4.14/net/xfrm/
H A Dxfrm_algo.c87 .name = "rfc4309(ccm(aes))",
106 .name = "rfc4309(ccm(aes))",
125 .name = "rfc4309(ccm(aes))",
/linux-4.4.14/crypto/
H A DMakefile75 obj-$(CONFIG_CRYPTO_CCM) += ccm.o
H A Dccm.c622 if (snprintf(full_name, CRYPTO_MAX_ALG_NAME, "ccm(%s)", cipher_name) >= crypto_ccm_create()
631 .name = "ccm",
940 MODULE_ALIAS_CRYPTO("ccm");
H A Dtcrypt.c1453 ret += tcrypt_test("ccm(aes)"); do_test()
1485 ret += tcrypt_test("rfc4309(ccm(aes))"); do_test()
1796 test_aead_speed("rfc4309(ccm(aes))", ENCRYPT, sec, do_test()
H A Dtestmgr.c2464 .alg = "ccm(aes)",
3545 .alg = "rfc4309(ccm(aes))",
H A Dtestmgr.h94 unsigned char novrfy; /* ccm dec verification failure expected */
/linux-4.4.14/drivers/crypto/caam/
H A Dpdb.h91 struct ipsec_encap_ccm ccm; member in union:ipsec_encap_pdb::__anon3835
128 struct ipsec_decap_ccm ccm; member in union:ipsec_decap_pdb::__anon3836
/linux-4.4.14/drivers/iommu/
H A Dfsl_pamu.c854 void __iomem *ccm = NULL; create_csd() local
906 ccm = of_iomap(np, 0); create_csd()
907 if (!ccm) { create_csd()
913 csdids = ccm + 0x600; create_csd()
966 if (ccm) create_csd()
967 iounmap(ccm); create_csd()
/linux-4.4.14/drivers/s390/char/
H A Dsclp_cmd.c651 u8 ccm; member in struct:chp_cfg_sccb
718 u8 ccm; member in struct:chp_info_sccb
/linux-4.4.14/drivers/pinctrl/bcm/
H A Dpinctrl-cygnus-gpio.c663 .compatible = "brcm,cygnus-ccm-gpio",
/linux-4.4.14/net/mac802154/
H A Dllsec.c136 key->tfm[i] = crypto_alloc_aead("ccm(aes)", 0, llsec_key_alloc()

Completed in 1016 milliseconds