Searched refs:cchip (Results 1 - 3 of 3) sorted by relevance

/linux-4.4.14/arch/alpha/kernel/
H A Dsys_titan.c63 register titan_cchip *cchip = TITAN_cchip; titan_update_irq_hw()
84 dim0 = &cchip->dim0.csr; titan_update_irq_hw()
85 dim1 = &cchip->dim1.csr; titan_update_irq_hw()
86 dim2 = &cchip->dim2.csr; titan_update_irq_hw()
87 dim3 = &cchip->dim3.csr; titan_update_irq_hw()
104 dimB = &cchip->dim0.csr; titan_update_irq_hw()
105 if (bcpu == 1) dimB = &cchip->dim1.csr; titan_update_irq_hw()
106 else if (bcpu == 2) dimB = &cchip->dim2.csr; titan_update_irq_hw()
107 else if (bcpu == 3) dimB = &cchip->dim3.csr; titan_update_irq_hw()
62 register titan_cchip *cchip = TITAN_cchip; titan_update_irq_hw() local
H A Dsys_dp264.c49 register tsunami_cchip *cchip = TSUNAMI_cchip; tsunami_update_irq_hw() local
68 dim0 = &cchip->dim0.csr; tsunami_update_irq_hw()
69 dim1 = &cchip->dim1.csr; tsunami_update_irq_hw()
70 dim2 = &cchip->dim2.csr; tsunami_update_irq_hw()
71 dim3 = &cchip->dim3.csr; tsunami_update_irq_hw()
88 if (bcpu == 0) dimB = &cchip->dim0.csr; tsunami_update_irq_hw()
89 else if (bcpu == 1) dimB = &cchip->dim1.csr; tsunami_update_irq_hw()
90 else if (bcpu == 2) dimB = &cchip->dim2.csr; tsunami_update_irq_hw()
91 else dimB = &cchip->dim3.csr; tsunami_update_irq_hw()
/linux-4.4.14/arch/sh/boards/mach-se/770x/
H A Dsetup.c27 /* XXX: Another candidate for a more generic cchip machine vector */ smsc_setup()

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