Searched refs:bus_clk_rate (Results 1 – 5 of 5) sorted by relevance
357 u32 bus_clk_rate; in i2c_lpc2k_probe() local404 &bus_clk_rate); in i2c_lpc2k_probe()406 bus_clk_rate = 100000; /* 100 kHz default clock rate */ in i2c_lpc2k_probe()416 clkrate = clkrate / bus_clk_rate; in i2c_lpc2k_probe()417 if (bus_clk_rate <= 100000) in i2c_lpc2k_probe()419 else if (bus_clk_rate <= 400000) in i2c_lpc2k_probe()
108 u32 bus_clk_rate; member137 u32 divisor = clk_get_rate(idev->i2c_clk) / idev->bus_clk_rate; in axxia_i2c_init()146 idev->bus_clk_rate, clk_mhz, divisor); in axxia_i2c_init()161 if (idev->bus_clk_rate <= 100000) { in axxia_i2c_init()531 of_property_read_u32(np, "clock-frequency", &idev->bus_clk_rate); in axxia_i2c_probe()532 if (idev->bus_clk_rate == 0) in axxia_i2c_probe()533 idev->bus_clk_rate = 100000; /* default clock rate */ in axxia_i2c_probe()
229 u32 bus_clk_rate, divider; in bcm2835_i2c_probe() local252 &bus_clk_rate); in bcm2835_i2c_probe()256 bus_clk_rate = 100000; in bcm2835_i2c_probe()259 divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), bus_clk_rate); in bcm2835_i2c_probe()
184 u32 bus_clk_rate; member636 udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate)); in tegra_i2c_xfer_msg()801 &i2c_dev->bus_clk_rate); in tegra_i2c_probe()803 i2c_dev->bus_clk_rate = 100000; /* default clock rate */ in tegra_i2c_probe()840 (i2c_dev->bus_clk_rate == 1000000)) in tegra_i2c_probe()846 i2c_dev->bus_clk_rate * clk_multiplier); in tegra_i2c_probe()
996 u32 bus_clk_rate; in at91_twi_probe() local1049 &bus_clk_rate); in at91_twi_probe()1051 bus_clk_rate = DEFAULT_TWI_CLK_HZ; in at91_twi_probe()1053 at91_calc_twi_clock(dev, bus_clk_rate); in at91_twi_probe()