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Searched refs:bnx2x_cl45_write (Results 1 - 1 of 1) sorted by relevance

/linux-4.4.14/drivers/net/ethernet/broadcom/bnx2x/
H A D	bnx2x_link.c	210 bnx2x_cl45_write(_bp, _phy, \ 2750 static int bnx2x_cl45_write(struct bnx2x bp, struct bnx2x_phy phy, bnx2x_cl45_write() function 2970 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_EEE_ADV, 0x0); bnx2x_eee_disable() 2996 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_EEE_ADV, val); bnx2x_eee_advertise() 3182 bnx2x_cl45_write(bp, phy, devad, reg, val \| or_val); bnx2x_cl45_read_or_write() 3191 bnx2x_cl45_write(bp, phy, devad, reg, val & and_val); bnx2x_cl45_read_and_write() 3220 return bnx2x_cl45_write(params->bp, bnx2x_phy_write() 3490 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, val); bnx2x_ext_phy_set_pause() 3665 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, bnx2x_warpcore_enable_AN_KR2() 3700 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, bnx2x_disable_kr2() 3714 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_lpi_passthrough() 3728 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_warpcore_restart_AN_KR() 3754 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, bnx2x_warpcore_enable_AN_KR() 3761 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR() 3784 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_warpcore_enable_AN_KR() 3792 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR() 3797 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR() 3800 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR() 3803 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR() 3808 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_warpcore_enable_AN_KR() 3812 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_warpcore_enable_AN_KR() 3835 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR() 3849 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR() 3856 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR() 3876 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_enable_AN_KR() 3907 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, bnx2x_warpcore_set_10G_KR() 3918 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_KR() 3924 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_KR() 3929 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, bnx2x_warpcore_set_10G_KR() 3932 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, bnx2x_warpcore_set_10G_KR() 3936 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_KR() 3940 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_KR() 3948 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_KR() 3950 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_KR() 3973 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0); bnx2x_warpcore_set_10G_XFI() 3995 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_XFI() 4056 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_XFI() 4061 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_XFI() 4064 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_XFI() 4079 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_10G_XFI() 4108 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_warpcore_set_20G_force_KR2() 4115 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_force_KR2() 4129 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_force_KR2() 4131 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_force_KR2() 4149 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4153 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4156 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4159 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4162 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4165 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4168 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4171 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4174 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4177 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4181 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4185 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4189 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4193 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_20G_DXGXS() 4240 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_sgmii_speed() 4258 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_sgmii_speed() 4265 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_sgmii_speed() 4270 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_sgmii_speed() 4275 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_sgmii_speed() 4292 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_reset_lane() 4325 bnx2x_cl45_write(bp, phy, wc_regs[i].devad, wc_regs[i].reg, bnx2x_warpcore_clear_regs() 4329 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_clear_regs() 4442 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_warpcore_config_runtime() 4640 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_link_reset() 4652 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_link_reset() 4686 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_set_warpcore_loopback() 6276 bnx2x_cl45_write(bp, phy, bnx2x_set_xgxs_loopback() 6282 bnx2x_cl45_write(bp, phy, bnx2x_set_xgxs_loopback() 6303 bnx2x_cl45_write(bp, phy, 5, bnx2x_set_xgxs_loopback() 7168 bnx2x_cl45_write(bp, phy, bnx2x_8073_8727_external_rom_boot() 7174 bnx2x_cl45_write(bp, phy, bnx2x_8073_8727_external_rom_boot() 7179 bnx2x_cl45_write(bp, phy, bnx2x_8073_8727_external_rom_boot() 7184 bnx2x_cl45_write(bp, phy, bnx2x_8073_8727_external_rom_boot() 7190 bnx2x_cl45_write(bp, phy, bnx2x_8073_8727_external_rom_boot() 7223 bnx2x_cl45_write(bp, phy, bnx2x_8073_8727_external_rom_boot() 7324 bnx2x_cl45_write(bp, phy, bnx2x_807x_force_10G() 7326 bnx2x_cl45_write(bp, phy, bnx2x_807x_force_10G() 7328 bnx2x_cl45_write(bp, phy, bnx2x_807x_force_10G() 7330 bnx2x_cl45_write(bp, phy, bnx2x_807x_force_10G() 7364 bnx2x_cl45_write(bp, phy, bnx2x_8073_set_pause_cl37() 7377 bnx2x_cl45_write(bp, phy, bnx2x_8073_specific_func() 7379 bnx2x_cl45_write(bp, phy, bnx2x_8073_specific_func() 7424 bnx2x_cl45_write(bp, phy, bnx2x_8073_config_init() 7440 bnx2x_cl45_write(bp, phy, bnx2x_8073_config_init() 7450 bnx2x_cl45_write(bp, phy, bnx2x_8073_config_init() 7477 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV, val); bnx2x_8073_config_init() 7498 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_8073_2_5G, tmp1); bnx2x_8073_config_init() 7502 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_FC_LD, bnx2x_8073_config_init() 7507 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); bnx2x_8073_config_init() 7514 bnx2x_cl45_write(bp, phy, bnx2x_8073_config_init() 7521 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV2, tmp1); bnx2x_8073_config_init() 7527 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200); bnx2x_8073_config_init() 7600 bnx2x_cl45_write(bp, phy, bnx2x_8073_read_status() 7605 bnx2x_cl45_write(bp, phy, bnx2x_8073_read_status() 7653 bnx2x_cl45_write(bp, phy, bnx2x_8073_read_status() 7708 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0xa040); bnx2x_8705_config_init() 7711 bnx2x_cl45_write(bp, phy, bnx2x_8705_config_init() 7713 bnx2x_cl45_write(bp, phy, bnx2x_8705_config_init() 7715 bnx2x_cl45_write(bp, phy, bnx2x_8705_config_init() 7717 bnx2x_cl45_write(bp, phy, bnx2x_8705_config_init() 7778 bnx2x_cl45_write(bp, phy, bnx2x_set_disable_pmd_transmit() 7826 bnx2x_cl45_write(bp, phy, bnx2x_sfp_e1e2_set_transmitter() 7880 bnx2x_cl45_write(bp, phy, bnx2x_8726_read_sfp_module_eeprom() 7885 bnx2x_cl45_write(bp, phy, bnx2x_8726_read_sfp_module_eeprom() 7890 bnx2x_cl45_write(bp, phy, bnx2x_8726_read_sfp_module_eeprom() 8013 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_sfp_module_eeprom() 8025 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_sfp_module_eeprom() 8031 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_sfp_module_eeprom() 8036 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_sfp_module_eeprom() 8042 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_sfp_module_eeprom() 8408 bnx2x_cl45_write(bp, phy, bnx2x_8727_power_module() 8429 bnx2x_cl45_write(bp, phy, bnx2x_8726_set_limiting_mode() 8443 bnx2x_cl45_write(bp, phy, bnx2x_8726_set_limiting_mode() 8447 bnx2x_cl45_write(bp, phy, bnx2x_8726_set_limiting_mode() 8451 bnx2x_cl45_write(bp, phy, bnx2x_8726_set_limiting_mode() 8455 bnx2x_cl45_write(bp, phy, bnx2x_8726_set_limiting_mode() 8474 bnx2x_cl45_write(bp, phy, bnx2x_8727_set_limiting_mode() 8484 bnx2x_cl45_write(bp, phy, bnx2x_8727_set_limiting_mode() 8489 bnx2x_cl45_write(bp, phy, bnx2x_8727_set_limiting_mode() 8512 bnx2x_cl45_write(bp, phy, bnx2x_8727_specific_func() 8515 bnx2x_cl45_write(bp, phy, bnx2x_8727_specific_func() 8518 bnx2x_cl45_write(bp, phy, bnx2x_8727_specific_func() 8532 bnx2x_cl45_write(bp, phy, bnx2x_8727_specific_func() 8666 bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, bnx2x_warpcore_set_limiting_mode() 8841 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, alarm_ctrl_offset, val); bnx2x_sfp_mask_fault() 8920 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0xa040); bnx2x_8706_config_init() 8947 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, reg, val); bnx2x_8706_config_init() 8954 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init() 8957 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init() 8961 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init() 8968 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init() 8972 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init() 8975 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init() 8978 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init() 8982 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init() 8984 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init() 8987 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init() 9007 bnx2x_cl45_write(bp, phy, bnx2x_8706_config_init() 9029 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0x0001); bnx2x_8726_config_loopback() 9040 bnx2x_cl45_write(bp, phy, bnx2x_8726_external_rom_boot() 9044 bnx2x_cl45_write(bp, phy, bnx2x_8726_external_rom_boot() 9049 bnx2x_cl45_write(bp, phy, bnx2x_8726_external_rom_boot() 9053 bnx2x_cl45_write(bp, phy, bnx2x_8726_external_rom_boot() 9062 bnx2x_cl45_write(bp, phy, bnx2x_8726_external_rom_boot() 9098 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15); bnx2x_8726_config_init() 9112 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9114 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9116 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9118 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9130 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9132 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9134 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9136 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9138 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9143 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9145 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9150 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9161 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9166 bnx2x_cl45_write(bp, phy, bnx2x_8726_config_init() 9182 bnx2x_cl45_write(bp, phy, bnx2x_8726_link_reset() 9222 bnx2x_cl45_write(bp, phy, bnx2x_8727_set_link_led() 9232 bnx2x_cl45_write(bp, phy, bnx2x_8727_set_link_led() 9261 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed() 9263 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed() 9276 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed() 9288 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed() 9290 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed() 9296 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed() 9299 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed() 9301 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed() 9303 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_speed() 9335 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_init() 9358 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_init() 9362 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_init() 9382 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_init() 9387 bnx2x_cl45_write(bp, phy, bnx2x_8727_config_init() 9423 bnx2x_cl45_write(bp, phy, bnx2x_8727_handle_mod_abs() 9448 bnx2x_cl45_write(bp, phy, bnx2x_8727_handle_mod_abs() 9540 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_status() 9549 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_status() 9565 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_status() 9632 bnx2x_cl45_write(bp, phy, bnx2x_8727_read_status() 9650 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, 0); bnx2x_8727_link_reset() 9686 bnx2x_cl45_write(bp, phy, reg_set[i].devad, bnx2x_save_848xx_spirom_version() 9705 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819, 0x0000); bnx2x_save_848xx_spirom_version() 9706 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A, 0xc200); bnx2x_save_848xx_spirom_version() 9707 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817, 0x000A); bnx2x_save_848xx_spirom_version() 9752 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_led() 9757 bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, bnx2x_848xx_set_led() 9802 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init() 9834 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init() 9882 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init() 9894 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init() 9900 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init() 9912 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init() 9928 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init() 9932 bnx2x_cl45_write(bp, phy, bnx2x_848xx_cmn_config_init() 9953 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15); bnx2x_8481_config_init() 9994 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_84858_cmd_hdlr() 10002 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_84858_cmd_hdlr() 10045 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_84833_cmd_hdlr() 10062 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_84833_cmd_hdlr() 10066 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_84833_cmd_hdlr() 10087 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_84833_cmd_hdlr() 10193 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_84833_hw_reset_phy() 10196 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_84833_hw_reset_phy() 10278 bnx2x_cl45_write(bp, phy, bnx2x_848x3_config_init() 10350 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_848x3_config_init() 10386 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, bnx2x_848x3_config_init() 10457 bnx2x_cl45_write(bp, phy, bnx2x_848xx_read_status() 10579 bnx2x_cl45_write(params->bp, phy, bnx2x_8481_link_reset() 10581 bnx2x_cl45_write(params->bp, phy, bnx2x_8481_link_reset() 10606 bnx2x_cl45_write(bp, phy, bnx2x_848x3_link_reset() 10633 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10638 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10643 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10648 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10654 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10669 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10674 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10679 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10684 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10690 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10711 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10732 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10738 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10743 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10748 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10753 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10758 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10779 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10804 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10811 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10816 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10821 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10826 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10840 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10852 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 10861 bnx2x_cl45_write(bp, phy, bnx2x_848xx_set_link_led() 11105 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, bnx2x_54618se_config_init() 11340 bnx2x_cl45_write(bp, phy, bnx2x_7101_config_loopback() 11359 bnx2x_cl45_write(bp, phy, bnx2x_7101_config_init() 11362 bnx2x_cl45_write(bp, phy, bnx2x_7101_config_init() 11370 bnx2x_cl45_write(bp, phy, bnx2x_7101_config_init() 11448 bnx2x_cl45_write(bp, phy, bnx2x_sfx7101_sp_sw_reset() 11489 bnx2x_cl45_write(bp, phy, bnx2x_7101_set_link_led() 13117 bnx2x_cl45_write(bp, &phy[port], bnx2x_8073_common_init_phy() 13153 bnx2x_cl45_write(bp, phy_blk[port], bnx2x_8073_common_init_phy() 13172 bnx2x_cl45_write(bp, phy_blk[port], bnx2x_8073_common_init_phy() 13181 bnx2x_cl45_write(bp, phy_blk[port], bnx2x_8073_common_init_phy() 13228 bnx2x_cl45_write(bp, &phy, bnx2x_8726_common_init_phy() 13352 bnx2x_cl45_write(bp, &phy[port], bnx2x_8727_common_init_phy() 13377 bnx2x_cl45_write(bp, phy_blk[port], bnx2x_8727_common_init_phy()

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