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Searched refs:bfin_read16 (Results 1 – 36 of 36) sorted by relevance

/linux-4.4.14/arch/blackfin/mach-bf548/include/mach/
DcdefBF548.h18 #define bfin_read_CAN1_MC1() bfin_read16(CAN1_MC1)
20 #define bfin_read_CAN1_MD1() bfin_read16(CAN1_MD1)
22 #define bfin_read_CAN1_TRS1() bfin_read16(CAN1_TRS1)
24 #define bfin_read_CAN1_TRR1() bfin_read16(CAN1_TRR1)
26 #define bfin_read_CAN1_TA1() bfin_read16(CAN1_TA1)
28 #define bfin_read_CAN1_AA1() bfin_read16(CAN1_AA1)
30 #define bfin_read_CAN1_RMP1() bfin_read16(CAN1_RMP1)
32 #define bfin_read_CAN1_RML1() bfin_read16(CAN1_RML1)
34 #define bfin_read_CAN1_MBTIF1() bfin_read16(CAN1_MBTIF1)
36 #define bfin_read_CAN1_MBRIF1() bfin_read16(CAN1_MBRIF1)
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DcdefBF544.h17 #define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG)
25 #define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG)
33 #define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG)
44 #define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1)
46 #define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1)
53 #define bfin_read_EPPI0_STATUS() bfin_read16(EPPI0_STATUS)
55 #define bfin_read_EPPI0_HCOUNT() bfin_read16(EPPI0_HCOUNT)
57 #define bfin_read_EPPI0_HDELAY() bfin_read16(EPPI0_HDELAY)
59 #define bfin_read_EPPI0_VCOUNT() bfin_read16(EPPI0_VCOUNT)
61 #define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELAY)
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DcdefBF542.h17 #define bfin_read_ATAPI_CONTROL() bfin_read16(ATAPI_CONTROL)
19 #define bfin_read_ATAPI_STATUS() bfin_read16(ATAPI_STATUS)
21 #define bfin_read_ATAPI_DEV_ADDR() bfin_read16(ATAPI_DEV_ADDR)
23 #define bfin_read_ATAPI_DEV_TXBUF() bfin_read16(ATAPI_DEV_TXBUF)
25 #define bfin_read_ATAPI_DEV_RXBUF() bfin_read16(ATAPI_DEV_RXBUF)
27 #define bfin_read_ATAPI_INT_MASK() bfin_read16(ATAPI_INT_MASK)
29 #define bfin_read_ATAPI_INT_STATUS() bfin_read16(ATAPI_INT_STATUS)
31 #define bfin_read_ATAPI_XFER_LEN() bfin_read16(ATAPI_XFER_LEN)
33 #define bfin_read_ATAPI_LINE_STATUS() bfin_read16(ATAPI_LINE_STATUS)
35 #define bfin_read_ATAPI_SM_STATE() bfin_read16(ATAPI_SM_STATE)
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DcdefBF547.h17 #define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG)
25 #define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG)
33 #define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG)
44 #define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1)
46 #define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1)
53 #define bfin_read_SPORT0_TCR1() bfin_read16(SPORT0_TCR1)
55 #define bfin_read_SPORT0_TCR2() bfin_read16(SPORT0_TCR2)
57 #define bfin_read_SPORT0_TCLKDIV() bfin_read16(SPORT0_TCLKDIV)
59 #define bfin_read_SPORT0_TFSDIV() bfin_read16(SPORT0_TFSDIV)
65 #define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR1)
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DcdefBF54x_base.h16 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
17 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
19 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
20 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
22 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
32 #define bfin_read_SWRST() bfin_read16(SWRST)
34 #define bfin_read_SYSCR() bfin_read16(SYSCR)
92 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
103 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
105 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)
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DcdefBF549.h18 #define bfin_read_MXVR_CONFIG() bfin_read16(MXVR_CONFIG)
32 #define bfin_read_MXVR_POSITION() bfin_read16(MXVR_POSITION)
34 #define bfin_read_MXVR_MAX_POSITION() bfin_read16(MXVR_MAX_POSITION)
36 #define bfin_read_MXVR_DELAY() bfin_read16(MXVR_DELAY)
38 #define bfin_read_MXVR_MAX_DELAY() bfin_read16(MXVR_MAX_DELAY)
42 #define bfin_read_MXVR_GADDR() bfin_read16(MXVR_GADDR)
105 #define bfin_read_MXVR_DMA0_COUNT() bfin_read16(MXVR_DMA0_COUNT)
109 #define bfin_read_MXVR_DMA0_CURR_COUNT() bfin_read16(MXVR_DMA0_CURR_COUNT)
118 #define bfin_read_MXVR_DMA1_COUNT() bfin_read16(MXVR_DMA1_COUNT)
122 #define bfin_read_MXVR_DMA1_CURR_COUNT() bfin_read16(MXVR_DMA1_CURR_COUNT)
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/linux-4.4.14/arch/blackfin/mach-bf527/include/mach/
DcdefBF525.h15 #define bfin_read_USB_FADDR() bfin_read16(USB_FADDR)
17 #define bfin_read_USB_POWER() bfin_read16(USB_POWER)
19 #define bfin_read_USB_INTRTX() bfin_read16(USB_INTRTX)
21 #define bfin_read_USB_INTRRX() bfin_read16(USB_INTRRX)
23 #define bfin_read_USB_INTRTXE() bfin_read16(USB_INTRTXE)
25 #define bfin_read_USB_INTRRXE() bfin_read16(USB_INTRRXE)
27 #define bfin_read_USB_INTRUSB() bfin_read16(USB_INTRUSB)
29 #define bfin_read_USB_INTRUSBE() bfin_read16(USB_INTRUSBE)
31 #define bfin_read_USB_FRAME() bfin_read16(USB_FRAME)
33 #define bfin_read_USB_INDEX() bfin_read16(USB_INDEX)
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DcdefBF522.h11 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
12 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
14 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
15 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
17 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
24 #define bfin_read_SWRST() bfin_read16(SWRST)
26 #define bfin_read_SYSCR() bfin_read16(SYSCR)
73 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
84 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
86 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)
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/linux-4.4.14/arch/blackfin/mach-bf537/include/mach/
DcdefBF534.h11 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
12 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
14 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
15 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
17 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
22 #define bfin_read_SWRST() bfin_read16(SWRST)
24 #define bfin_read_SYSCR() bfin_read16(SYSCR)
44 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
54 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
56 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)
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/linux-4.4.14/arch/blackfin/mach-bf538/include/mach/
DcdefBF538.h12 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
13 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
15 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
16 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
18 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
22 #define bfin_read_SWRST() bfin_read16(SWRST)
24 #define bfin_read_SYSCR() bfin_read16(SYSCR)
60 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
68 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
70 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)
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DcdefBF539.h13 #define bfin_read_MXVR_CONFIG() bfin_read16(MXVR_CONFIG)
29 #define bfin_read_MXVR_POSITION() bfin_read16(MXVR_POSITION)
31 #define bfin_read_MXVR_MAX_POSITION() bfin_read16(MXVR_MAX_POSITION)
33 #define bfin_read_MXVR_DELAY() bfin_read16(MXVR_DELAY)
35 #define bfin_read_MXVR_MAX_DELAY() bfin_read16(MXVR_MAX_DELAY)
39 #define bfin_read_MXVR_GADDR() bfin_read16(MXVR_GADDR)
93 #define bfin_read_MXVR_DMA0_COUNT() bfin_read16(MXVR_DMA0_COUNT)
97 #define bfin_read_MXVR_DMA0_CURR_COUNT() bfin_read16(MXVR_DMA0_CURR_COUNT)
103 #define bfin_read_MXVR_DMA1_COUNT() bfin_read16(MXVR_DMA1_COUNT)
107 #define bfin_read_MXVR_DMA1_CURR_COUNT() bfin_read16(MXVR_DMA1_CURR_COUNT)
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/linux-4.4.14/arch/blackfin/mach-bf561/include/mach/
DcdefBF561.h15 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
16 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
18 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
19 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
21 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
26 #define bfin_read_SWRST() bfin_read16(SWRST)
28 #define bfin_read_SYSCR() bfin_read16(SYSCR)
30 #define bfin_read_SIC_RVECT() bfin_read16(SIC_RVECT)
62 #define bfin_read_SICB_SWRST() bfin_read16(SICB_SWRST)
64 #define bfin_read_SICB_SYSCR() bfin_read16(SICB_SYSCR)
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/linux-4.4.14/arch/blackfin/mach-bf518/include/mach/
DcdefBF512.h11 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
12 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
14 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
15 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
17 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
24 #define bfin_read_SWRST() bfin_read16(SWRST)
26 #define bfin_read_SYSCR() bfin_read16(SYSCR)
73 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
84 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
86 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)
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DcdefBF514.h15 #define bfin_read_RSI_PWR_CTL() bfin_read16(RSI_PWR_CONTROL)
17 #define bfin_read_RSI_CLK_CTL() bfin_read16(RSI_CLK_CONTROL)
21 #define bfin_read_RSI_COMMAND() bfin_read16(RSI_COMMAND)
23 #define bfin_read_RSI_RESP_CMD() bfin_read16(RSI_RESP_CMD)
35 #define bfin_read_RSI_DATA_LGTH() bfin_read16(RSI_DATA_LGTH)
37 #define bfin_read_RSI_DATA_CTL() bfin_read16(RSI_DATA_CONTROL)
39 #define bfin_read_RSI_DATA_CNT() bfin_read16(RSI_DATA_CNT)
43 #define bfin_read_RSI_STATUS_CLR() bfin_read16(RSI_STATUSCL)
49 #define bfin_read_RSI_FIFO_CNT() bfin_read16(RSI_FIFO_CNT)
51 #define bfin_read_RSI_CEATA_CTL() bfin_read16(RSI_CEATA_CONTROL)
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DcdefBF518.h15 #define bfin_read_EMAC_PTP_CTL() bfin_read16(EMAC_PTP_CTL)
17 #define bfin_read_EMAC_PTP_IE() bfin_read16(EMAC_PTP_IE)
19 #define bfin_read_EMAC_PTP_ISTAT() bfin_read16(EMAC_PTP_ISTAT)
47 #define bfin_read_EMAC_PTP_ID_OFF() bfin_read16(EMAC_PTP_ID_OFF)
/linux-4.4.14/arch/blackfin/mach-bf533/include/mach/
DcdefBF532.h11 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
12 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
14 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
17 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
19 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
22 #define bfin_read_SWRST() bfin_read16(SWRST)
24 #define bfin_read_SYSCR() bfin_read16(SYSCR)
42 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
52 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
54 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)
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/linux-4.4.14/arch/blackfin/mach-bf609/include/mach/
DcdefBF60x_base.h43 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
198 #define bfin_read_TIMER0_CONFIG() bfin_read16(TIMER0_CONFIG)
206 #define bfin_read_TIMER1_CONFIG() bfin_read16(TIMER1_CONFIG)
214 #define bfin_read_TIMER2_CONFIG() bfin_read16(TIMER2_CONFIG)
222 #define bfin_read_TIMER3_CONFIG() bfin_read16(TIMER3_CONFIG)
230 #define bfin_read_TIMER4_CONFIG() bfin_read16(TIMER4_CONFIG)
238 #define bfin_read_TIMER5_CONFIG() bfin_read16(TIMER5_CONFIG)
246 #define bfin_read_TIMER6_CONFIG() bfin_read16(TIMER6_CONFIG)
254 #define bfin_read_TIMER7_CONFIG() bfin_read16(TIMER7_CONFIG)
2426 #define bfin_read_CAN0_MC1() bfin_read16(CAN0_MC1)
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/linux-4.4.14/drivers/tty/serial/
Dbfin_sport_uart.h34 #define SPORT_GET_TCR1(sport) bfin_read16(((sport)->port.membase + OFFSET_TCR1))
35 #define SPORT_GET_TCR2(sport) bfin_read16(((sport)->port.membase + OFFSET_TCR2))
36 #define SPORT_GET_TCLKDIV(sport) bfin_read16(((sport)->port.membase + OFFSET_TCLKDIV))
37 #define SPORT_GET_TFSDIV(sport) bfin_read16(((sport)->port.membase + OFFSET_TFSDIV))
38 #define SPORT_GET_TX(sport) bfin_read16(((sport)->port.membase + OFFSET_TX))
39 #define SPORT_GET_RX(sport) bfin_read16(((sport)->port.membase + OFFSET_RX))
56 #define SPORT_GET_RCR1(sport) bfin_read16(((sport)->port.membase + OFFSET_RCR1))
57 #define SPORT_GET_RCR2(sport) bfin_read16(((sport)->port.membase + OFFSET_RCR2))
58 #define SPORT_GET_RCLKDIV(sport) bfin_read16(((sport)->port.membase + OFFSET_RCLKDIV))
59 #define SPORT_GET_RFSDIV(sport) bfin_read16(((sport)->port.membase + OFFSET_RFSDIV))
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/linux-4.4.14/arch/blackfin/include/asm/
Dbfin_twi.h16 { return bfin_read16(&iface->regs_base->reg); } \
42 ret = bfin_read16(&iface->regs_base->rcv_data8); in DEFINE_TWI_REG()
54 ret = bfin_read16(&iface->regs_base->rcv_data16);
63 return bfin_read16(&iface->regs_base->fifo_ctl);
74 return bfin_read16(&iface->regs_base->control); in read_CONTROL()
Dbfin_serial.h329 #define UART_GET_CHAR(p) bfin_read16(port_membase(p) + OFFSET_RBR)
330 #define UART_GET_DLL(p) bfin_read16(port_membase(p) + OFFSET_DLL)
331 #define UART_GET_DLH(p) bfin_read16(port_membase(p) + OFFSET_DLH)
333 #define UART_GET_GCTL(p) bfin_read16(port_membase(p) + OFFSET_GCTL)
334 #define UART_GET_LCR(p) bfin_read16(port_membase(p) + OFFSET_LCR)
335 #define UART_GET_MCR(p) bfin_read16(port_membase(p) + OFFSET_MCR)
336 #define UART_GET_MSR(p) bfin_read16(port_membase(p) + OFFSET_MSR)
353 #define UART_GET_IER(p) bfin_read16(port_membase(p) + OFFSET_IER_SET)
360 #define UART_GET_LSR(p) bfin_read16(port_membase(p) + OFFSET_LSR)
375 #define UART_GET_IER(p) bfin_read16(port_membase(p) + OFFSET_IER)
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Dio.h16 #define __raw_readw bfin_read16
Dprocessor.h116 bfin_read16(_BOOTROM_GET_DXE_ADDRESS_TWI) == 0x2796) in bfin_revid()
Ddef_LPBlackfin.h47 #define bfin_read16(addr) _bfin_readX(addr, 16, w, (z)) macro
56 sizeof(*(addr)) == 2 ? bfin_read16(addr) : \
Ddma.h64 #define DMA_MMR_READ bfin_read16
/linux-4.4.14/drivers/ata/
Dpata_bf54x.c78 bfin_read16(base + ATAPI_OFFSET_CONTROL)
82 bfin_read16(base + ATAPI_OFFSET_STATUS)
84 bfin_read16(base + ATAPI_OFFSET_DEV_ADDR)
88 bfin_read16(base + ATAPI_OFFSET_DEV_TXBUF)
92 bfin_read16(base + ATAPI_OFFSET_DEV_RXBUF)
96 bfin_read16(base + ATAPI_OFFSET_INT_MASK)
100 bfin_read16(base + ATAPI_OFFSET_INT_STATUS)
104 bfin_read16(base + ATAPI_OFFSET_XFER_LEN)
108 bfin_read16(base + ATAPI_OFFSET_LINE_STATUS)
110 bfin_read16(base + ATAPI_OFFSET_SM_STATE)
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/linux-4.4.14/arch/blackfin/mm/
Dmaccess.c30 u16 mmr = bfin_read16(src); in probe_kernel_read()
/linux-4.4.14/arch/blackfin/mach-common/
Dclocks-init.c119 bfin_read16(0); in init_clocks()
/linux-4.4.14/drivers/usb/musb/
Dblackfin.c43 return (u8)(bfin_read16(addr + offset)); in bfin_readb()
48 return bfin_read16(addr + offset); in bfin_readw()
53 return (u32)(bfin_read16(addr + offset)); in bfin_readl()
/linux-4.4.14/drivers/media/platform/blackfin/
Dppi.c62 status = bfin_read16(&reg->status); in ppi_irq_err()
73 status = bfin_read16(&reg->status); in ppi_irq_err()
/linux-4.4.14/arch/blackfin/mach-bf538/
Dext-gpio.c17 { return bfin_read16(port + off); } \
/linux-4.4.14/arch/blackfin/mach-bf537/boards/
Ddnp5370.c410 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4); in bfin_get_ether_addr()
Dstamp.c3016 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4); in bfin_get_ether_addr()
/linux-4.4.14/drivers/usb/host/
Disp1362.h21 bfin_read16(ASYNC_BANK0_BASE); \
22 bfin_read16(ASYNC_BANK0_BASE); \
23 bfin_read16(ASYNC_BANK0_BASE); \
/linux-4.4.14/arch/blackfin/kernel/
Dgptimers.c309 imask = bfin_read16(TIMER_DATA_IMSK); in enable_gptimers()
Dbfin_gpio.c42 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
Ddebug-mmrs.c441 return (bfin_read16(lmmr) & 0x1f) + 1; in sport_width()
459 *val = bfin_read16(mmr); in sport_get()