Searched refs:bdl_pos_adj (Results 1 – 8 of 8) sorted by relevance
126 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1}; variable151 module_param_array(bdl_pos_adj, int, NULL, 0644);152 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");671 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1; in azx_position_ok()1609 if (bdl_pos_adj[dev] < 0) { in azx_create()1613 bdl_pos_adj[dev] = 1; in azx_create()1616 bdl_pos_adj[dev] = 32; in azx_create()1620 chip->bdl_pos_adj = bdl_pos_adj; in azx_create()
146 const int *bdl_pos_adj; member
1053 if (chip->bdl_pos_adj) in azx_bus_init()1054 bus->core.bdl_pos_adj = chip->bdl_pos_adj[chip->dev_index]; in azx_bus_init()
365 ebus->bus.bdl_pos_adj = 0; in skl_create()
383 pos_adj = bus->bdl_pos_adj; in snd_hdac_stream_setup_periods()
298 int bdl_pos_adj; /* BDL position adjustment */ member
77 via `bdl_pos_adj` option. 79 When `bdl_pos_adj` is a negative value (as default), it's assigned to
877 bdl_pos_adj - Specifies the DMA IRQ timing delay in samples.