Searched refs:bar1_index (Results 1 – 2 of 2) sorted by relevance
637 union cvmx_pci_bar1_indexx bar1_index; in octeon_pci_setup() local639 bar1_index.u32 = 0; in octeon_pci_setup()641 bar1_index.s.addr_idx = in octeon_pci_setup()644 bar1_index.s.ca = 1; in octeon_pci_setup()646 bar1_index.s.end_swp = 1; in octeon_pci_setup()648 bar1_index.s.addr_v = 1; in octeon_pci_setup()650 bar1_index.u32); in octeon_pci_setup()673 union cvmx_pci_bar1_indexx bar1_index; in octeon_pci_setup() local675 bar1_index.u32 = 0; in octeon_pci_setup()677 bar1_index.s.addr_idx = in octeon_pci_setup()[all …]
707 union cvmx_npei_bar1_indexx bar1_index; in __cvmx_pcie_rc_initialize_gen1() local927 bar1_index.u32 = 0; in __cvmx_pcie_rc_initialize_gen1()928 bar1_index.s.addr_idx = (CVMX_PCIE_BAR1_PHYS_BASE >> 22); in __cvmx_pcie_rc_initialize_gen1()929 bar1_index.s.ca = 1; /* Not Cached */ in __cvmx_pcie_rc_initialize_gen1()930 bar1_index.s.end_swp = 1; /* Endian Swap mode */ in __cvmx_pcie_rc_initialize_gen1()931 bar1_index.s.addr_v = 1; /* Valid entry */ in __cvmx_pcie_rc_initialize_gen1()943 bar1_index.u32); in __cvmx_pcie_rc_initialize_gen1()946 bar1_index.s.addr_idx += (((1ull << 28) / 16ull) >> 22); in __cvmx_pcie_rc_initialize_gen1()1164 union cvmx_pemx_bar1_indexx bar1_index; in __cvmx_pcie_rc_initialize_gen2() local1410 bar1_index.u64 = 0; in __cvmx_pcie_rc_initialize_gen2()[all …]