Searched refs:bankh (Results 1 – 8 of 8) sorted by relevance
/linux-4.4.14/drivers/gpu/drm/radeon/ |
D | evergreen_cs.c | 177 unsigned bankh; member 269 halign = (8 * surf->bankh * surf->nbanks) / surf->mtilea; in evergreen_surface_check_2d() 357 switch (surf->bankh) { in evergreen_surface_value_conv_check() 358 case 0: surf->bankh = 1; break; in evergreen_surface_value_conv_check() 359 case 1: surf->bankh = 2; break; in evergreen_surface_value_conv_check() 360 case 2: surf->bankh = 4; break; in evergreen_surface_value_conv_check() 361 case 3: surf->bankh = 8; break; in evergreen_surface_value_conv_check() 364 __func__, __LINE__, prefix, surf->bankh); in evergreen_surface_value_conv_check() 411 surf.bankh = G_028C74_BANK_HEIGHT(track->cb_color_attrib[id]); in evergreen_cs_track_validate_cb() 486 surf.bankw, surf.bankh, in evergreen_cs_track_validate_cb() [all …]
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D | radeon_object.c | 668 unsigned bankw, bankh, mtaspect, tilesplit, stilesplit; in radeon_bo_set_tiling_flags() local 671 bankh = (tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANKH_MASK; in radeon_bo_set_tiling_flags() 685 switch (bankh) { in radeon_bo_set_tiling_flags()
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D | evergreen.c | 1107 unsigned *bankh, unsigned *mtaspect, in evergreen_tiling_fields() argument 1111 *bankh = (tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANKH_MASK; in evergreen_tiling_fields() 1121 switch (*bankh) { in evergreen_tiling_fields() 1123 case 1: *bankh = EVERGREEN_ADDR_SURF_BANK_HEIGHT_1; break; in evergreen_tiling_fields() 1124 case 2: *bankh = EVERGREEN_ADDR_SURF_BANK_HEIGHT_2; break; in evergreen_tiling_fields() 1125 case 4: *bankh = EVERGREEN_ADDR_SURF_BANK_HEIGHT_4; break; in evergreen_tiling_fields() 1126 case 8: *bankh = EVERGREEN_ADDR_SURF_BANK_HEIGHT_8; break; in evergreen_tiling_fields()
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D | atombios_crtc.c | 1148 unsigned bankw, bankh, mtaspect, tile_split; in dce4_crtc_do_set_base() local 1262 evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split); in dce4_crtc_do_set_base() 1328 fb_format |= EVERGREEN_GRPH_BANK_HEIGHT(bankh); in dce4_crtc_do_set_base()
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D | radeon.h | 348 unsigned *bankh, unsigned *mtaspect,
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/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
D | dce_v8_0.c | 2105 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v8_0_crtc_do_set_base() local 2108 bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in dce_v8_0_crtc_do_set_base() 2117 fb_format |= (bankh << GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT); in dce_v8_0_crtc_do_set_base()
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D | dce_v11_0.c | 2163 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v11_0_crtc_do_set_base() local 2166 bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in dce_v11_0_crtc_do_set_base() 2177 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_BANK_HEIGHT, bankh); in dce_v11_0_crtc_do_set_base()
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D | dce_v10_0.c | 2175 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v10_0_crtc_do_set_base() local 2178 bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in dce_v10_0_crtc_do_set_base() 2189 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_BANK_HEIGHT, bankh); in dce_v10_0_crtc_do_set_base()
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