Home
last modified time | relevance | path

Searched refs:bXBTxAGC (Results 1 – 9 of 9) sorted by relevance

/linux-4.4.14/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h289 #define bXBTxAGC 0xf00 macro
Dr8192E_phy.c581 (bXBTxAGC|bXCTxAGC|bXDTxAGC), dwRegValue); in _rtl92e_bb_config_para_file()
664 (bXBTxAGC|bXCTxAGC|bXDTxAGC), in rtl92e_set_tx_power()
/linux-4.4.14/drivers/staging/rtl8192u/
Dr819xU_phyreg.h283 #define bXBTxAGC 0xf00 macro
Dr819xU_phy.c828 rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC), in rtl8192_BB_Config_ParaFile()
/linux-4.4.14/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h432 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro
Drtl871x_mp.c335 (bXBTxAGC | bXCTxAGC | bXDTxAGC), tmpAGC); in r8712_SetTxAGCOffset()
/linux-4.4.14/drivers/staging/rtl8188eu/include/
Drtw_mp_phy_regdef.h460 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro
DHal8188EPhyReg.h518 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro
/linux-4.4.14/drivers/staging/rtl8723au/include/
DHal8723APhyReg.h451 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro