Home
last modified time | relevance | path

Searched refs:b3WireDataLength (Results 1 – 9 of 9) sorted by relevance

/linux-4.4.14/drivers/staging/rtl8192e/rtl8192e/
Dr8190P_rtl8256.c106 b3WireDataLength, 0x0); in rtl92e_config_rf()
Dr8192E_phyreg.h315 #define b3WireDataLength 0x800 macro
/linux-4.4.14/drivers/staging/rtl8192u/
Dr8190_rtl8256.c145 …rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for Z-seri… in phy_RF8256_Config_ParaFile()
Dr819xU_phyreg.h306 #define b3WireDataLength 0x800 macro
/linux-4.4.14/drivers/staging/rtl8723au/hal/
Drtl8723a_rf6052.c455 PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, in phy_RF6052_Config_ParaFile()
/linux-4.4.14/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h456 #define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParm1 */ macro
/linux-4.4.14/drivers/staging/rtl8188eu/include/
Drtw_mp_phy_regdef.h485 #define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ macro
DHal8188EPhyReg.h544 #define b3WireDataLength 0x800 macro
/linux-4.4.14/drivers/staging/rtl8723au/include/
DHal8723APhyReg.h476 #define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ macro