H A D | fsl_asrc.c | 28 dev_err(&asrc_priv->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__) 31 dev_dbg(&asrc_priv->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__) 96 struct fsl_asrc *asrc_priv = pair->asrc_priv; fsl_asrc_request_pair() local 97 struct device *dev = &asrc_priv->pdev->dev; fsl_asrc_request_pair() 101 spin_lock_irqsave(&asrc_priv->lock, lock_flags); fsl_asrc_request_pair() 104 if (asrc_priv->pair[i] != NULL) fsl_asrc_request_pair() 116 } else if (asrc_priv->channel_avail < channels) { fsl_asrc_request_pair() 120 asrc_priv->channel_avail -= channels; fsl_asrc_request_pair() 121 asrc_priv->pair[index] = pair; fsl_asrc_request_pair() 126 spin_unlock_irqrestore(&asrc_priv->lock, lock_flags); fsl_asrc_request_pair() 134 * It clears the resource from asrc_priv and releases the occupied channels. 138 struct fsl_asrc *asrc_priv = pair->asrc_priv; fsl_asrc_release_pair() local 143 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, fsl_asrc_release_pair() 146 spin_lock_irqsave(&asrc_priv->lock, lock_flags); fsl_asrc_release_pair() 148 asrc_priv->channel_avail += pair->channels; fsl_asrc_release_pair() 149 asrc_priv->pair[index] = NULL; fsl_asrc_release_pair() 152 spin_unlock_irqrestore(&asrc_priv->lock, lock_flags); fsl_asrc_release_pair() 160 struct fsl_asrc *asrc_priv = pair->asrc_priv; fsl_asrc_set_watermarks() local 163 regmap_update_bits(asrc_priv->regmap, REG_ASRMCR(index), fsl_asrc_set_watermarks() 196 struct fsl_asrc *asrc_priv = pair->asrc_priv; fsl_asrc_set_ideal_ratio() local 225 regmap_write(asrc_priv->regmap, REG_ASRIDRL(index), ratio); fsl_asrc_set_ideal_ratio() 226 regmap_write(asrc_priv->regmap, REG_ASRIDRH(index), ratio >> 24); fsl_asrc_set_ideal_ratio() 241 struct fsl_asrc *asrc_priv = pair->asrc_priv; fsl_asrc_config_pair() local 294 clk = asrc_priv->asrck_clk[clk_index[ideal ? OUT : IN]]; fsl_asrc_config_pair() 303 clk = asrc_priv->asrck_clk[clk_index[OUT]]; fsl_asrc_config_pair() 320 if (asrc_priv->channel_bits < 4) fsl_asrc_config_pair() 324 regmap_update_bits(asrc_priv->regmap, REG_ASRCNCR, fsl_asrc_config_pair() 325 ASRCNCR_ANCi_MASK(index, asrc_priv->channel_bits), fsl_asrc_config_pair() 326 ASRCNCR_ANCi(index, channels, asrc_priv->channel_bits)); fsl_asrc_config_pair() 329 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, fsl_asrc_config_pair() 331 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, fsl_asrc_config_pair() 335 regmap_update_bits(asrc_priv->regmap, REG_ASRCSR, fsl_asrc_config_pair() 345 regmap_update_bits(asrc_priv->regmap, REG_ASRCDR(index), fsl_asrc_config_pair() 351 regmap_update_bits(asrc_priv->regmap, REG_ASRMCR1(index), fsl_asrc_config_pair() 357 regmap_update_bits(asrc_priv->regmap, REG_ASRMCR(index), fsl_asrc_config_pair() 369 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, fsl_asrc_config_pair() 373 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, fsl_asrc_config_pair() 378 regmap_update_bits(asrc_priv->regmap, REG_ASRCFG, fsl_asrc_config_pair() 393 struct fsl_asrc *asrc_priv = pair->asrc_priv; fsl_asrc_start_pair() local 398 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, fsl_asrc_start_pair() 404 regmap_read(asrc_priv->regmap, REG_ASRCFG, ®); fsl_asrc_start_pair() 409 regmap_read(asrc_priv->regmap, REG_ASRCNCR, ®); fsl_asrc_start_pair() 411 regmap_write(asrc_priv->regmap, REG_ASRDI(index), 0); fsl_asrc_start_pair() 414 regmap_write(asrc_priv->regmap, REG_ASRIER, ASRIER_AOLIE); fsl_asrc_start_pair() 422 struct fsl_asrc *asrc_priv = pair->asrc_priv; fsl_asrc_stop_pair() local 426 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, fsl_asrc_stop_pair() 435 struct fsl_asrc *asrc_priv = pair->asrc_priv; fsl_asrc_get_dma_channel() local 441 return dma_request_slave_channel(&asrc_priv->pdev->dev, name); fsl_asrc_get_dma_channel() 449 struct fsl_asrc *asrc_priv = snd_soc_dai_get_drvdata(dai); fsl_asrc_dai_hw_params() local 471 if (asrc_priv->asrc_width == 16) fsl_asrc_dai_hw_params() 485 config.output_sample_rate = asrc_priv->asrc_rate; fsl_asrc_dai_hw_params() 489 config.input_sample_rate = asrc_priv->asrc_rate; fsl_asrc_dai_hw_params() 546 struct fsl_asrc *asrc_priv = snd_soc_dai_get_drvdata(dai); fsl_asrc_dai_probe() local 548 snd_soc_dai_init_dma_data(dai, &asrc_priv->dma_params_tx, fsl_asrc_dai_probe() 549 &asrc_priv->dma_params_rx); fsl_asrc_dai_probe() 728 static int fsl_asrc_init(struct fsl_asrc *asrc_priv) fsl_asrc_init() argument 731 regmap_write(asrc_priv->regmap, REG_ASRCTR, ASRCTR_ASRCEN); fsl_asrc_init() 734 regmap_write(asrc_priv->regmap, REG_ASRIER, 0x0); fsl_asrc_init() 737 regmap_write(asrc_priv->regmap, REG_ASRPM1, 0x7fffff); fsl_asrc_init() 738 regmap_write(asrc_priv->regmap, REG_ASRPM2, 0x255555); fsl_asrc_init() 739 regmap_write(asrc_priv->regmap, REG_ASRPM3, 0xff7280); fsl_asrc_init() 740 regmap_write(asrc_priv->regmap, REG_ASRPM4, 0xff7280); fsl_asrc_init() 741 regmap_write(asrc_priv->regmap, REG_ASRPM5, 0xff7280); fsl_asrc_init() 744 regmap_update_bits(asrc_priv->regmap, REG_ASRTFR1, fsl_asrc_init() 748 regmap_write(asrc_priv->regmap, REG_ASR76K, 0x06D6); fsl_asrc_init() 751 return regmap_write(asrc_priv->regmap, REG_ASR56K, 0x0947); fsl_asrc_init() 759 struct fsl_asrc *asrc_priv = (struct fsl_asrc *)dev_id; fsl_asrc_isr() local 760 struct device *dev = &asrc_priv->pdev->dev; fsl_asrc_isr() 764 regmap_read(asrc_priv->regmap, REG_ASRSTR, &status); fsl_asrc_isr() 767 regmap_write(asrc_priv->regmap, REG_ASRSTR, ASRSTR_AOLE); fsl_asrc_isr() 775 if (!asrc_priv->pair[index]) fsl_asrc_isr() 779 asrc_priv->pair[index]->error |= ASRC_TASK_Q_OVERLOAD; fsl_asrc_isr() 784 asrc_priv->pair[index]->error |= ASRC_OUTPUT_TASK_OVERLOAD; fsl_asrc_isr() 789 asrc_priv->pair[index]->error |= ASRC_INPUT_TASK_OVERLOAD; fsl_asrc_isr() 794 asrc_priv->pair[index]->error |= ASRC_OUTPUT_BUFFER_OVERFLOW; fsl_asrc_isr() 799 asrc_priv->pair[index]->error |= ASRC_INPUT_BUFFER_UNDERRUN; fsl_asrc_isr() 810 struct fsl_asrc *asrc_priv; fsl_asrc_probe() local 816 asrc_priv = devm_kzalloc(&pdev->dev, sizeof(*asrc_priv), GFP_KERNEL); fsl_asrc_probe() 817 if (!asrc_priv) fsl_asrc_probe() 820 asrc_priv->pdev = pdev; fsl_asrc_probe() 828 asrc_priv->paddr = res->start; fsl_asrc_probe() 830 asrc_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "mem", regs, fsl_asrc_probe() 832 if (IS_ERR(asrc_priv->regmap)) { fsl_asrc_probe() 834 return PTR_ERR(asrc_priv->regmap); fsl_asrc_probe() 844 dev_name(&pdev->dev), asrc_priv); fsl_asrc_probe() 850 asrc_priv->mem_clk = devm_clk_get(&pdev->dev, "mem"); fsl_asrc_probe() 851 if (IS_ERR(asrc_priv->mem_clk)) { fsl_asrc_probe() 853 return PTR_ERR(asrc_priv->mem_clk); fsl_asrc_probe() 856 asrc_priv->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); fsl_asrc_probe() 857 if (IS_ERR(asrc_priv->ipg_clk)) { fsl_asrc_probe() 859 return PTR_ERR(asrc_priv->ipg_clk); fsl_asrc_probe() 864 asrc_priv->asrck_clk[i] = devm_clk_get(&pdev->dev, tmp); fsl_asrc_probe() 865 if (IS_ERR(asrc_priv->asrck_clk[i])) { fsl_asrc_probe() 867 return PTR_ERR(asrc_priv->asrck_clk[i]); fsl_asrc_probe() 872 asrc_priv->channel_bits = 3; fsl_asrc_probe() 876 asrc_priv->channel_bits = 4; fsl_asrc_probe() 881 ret = fsl_asrc_init(asrc_priv); fsl_asrc_probe() 887 asrc_priv->channel_avail = 10; fsl_asrc_probe() 890 &asrc_priv->asrc_rate); fsl_asrc_probe() 897 &asrc_priv->asrc_width); fsl_asrc_probe() 903 if (asrc_priv->asrc_width != 16 && asrc_priv->asrc_width != 24) { fsl_asrc_probe() 905 asrc_priv->asrc_width = 24; fsl_asrc_probe() 908 platform_set_drvdata(pdev, asrc_priv); fsl_asrc_probe() 910 spin_lock_init(&asrc_priv->lock); fsl_asrc_probe() 933 struct fsl_asrc *asrc_priv = dev_get_drvdata(dev); fsl_asrc_runtime_resume() local 936 ret = clk_prepare_enable(asrc_priv->mem_clk); fsl_asrc_runtime_resume() 939 ret = clk_prepare_enable(asrc_priv->ipg_clk); fsl_asrc_runtime_resume() 943 ret = clk_prepare_enable(asrc_priv->asrck_clk[i]); fsl_asrc_runtime_resume() 952 clk_disable_unprepare(asrc_priv->asrck_clk[i]); fsl_asrc_runtime_resume() 953 clk_disable_unprepare(asrc_priv->ipg_clk); fsl_asrc_runtime_resume() 955 clk_disable_unprepare(asrc_priv->mem_clk); fsl_asrc_runtime_resume() 961 struct fsl_asrc *asrc_priv = dev_get_drvdata(dev); fsl_asrc_runtime_suspend() local 965 clk_disable_unprepare(asrc_priv->asrck_clk[i]); fsl_asrc_runtime_suspend() 966 clk_disable_unprepare(asrc_priv->ipg_clk); fsl_asrc_runtime_suspend() 967 clk_disable_unprepare(asrc_priv->mem_clk); fsl_asrc_runtime_suspend() 976 struct fsl_asrc *asrc_priv = dev_get_drvdata(dev); fsl_asrc_suspend() local 978 regcache_cache_only(asrc_priv->regmap, true); fsl_asrc_suspend() 979 regcache_mark_dirty(asrc_priv->regmap); fsl_asrc_suspend() 986 struct fsl_asrc *asrc_priv = dev_get_drvdata(dev); fsl_asrc_resume() local 990 regmap_read(asrc_priv->regmap, REG_ASRCTR, &asrctr); fsl_asrc_resume() 991 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, fsl_asrc_resume() 995 regcache_cache_only(asrc_priv->regmap, false); fsl_asrc_resume() 996 regcache_sync(asrc_priv->regmap); fsl_asrc_resume() 999 regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, fsl_asrc_resume()
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