Searched refs:apbc_base (Results 1 - 7 of 7) sorted by relevance

/linux-4.4.14/drivers/clk/mmp/
H A Dclk-pxa168.c76 void __iomem *apbc_base; pxa168_clk_init() local
90 apbc_base = ioremap(APB_PHYS_BASE + 0x15000, SZ_4K); pxa168_clk_init()
91 if (apbc_base == NULL) { pxa168_clk_init()
167 apbc_base + APBC_TWSI0, 10, 0, &clk_lock); pxa168_clk_init()
171 apbc_base + APBC_TWSI1, 10, 0, &clk_lock); pxa168_clk_init()
175 apbc_base + APBC_GPIO, 10, 0, &clk_lock); pxa168_clk_init()
179 apbc_base + APBC_KPC, 10, 0, &clk_lock); pxa168_clk_init()
183 apbc_base + APBC_RTC, 10, 0, &clk_lock); pxa168_clk_init()
187 apbc_base + APBC_PWM0, 10, 0, &clk_lock); pxa168_clk_init()
191 apbc_base + APBC_PWM1, 10, 0, &clk_lock); pxa168_clk_init()
195 apbc_base + APBC_PWM2, 10, 0, &clk_lock); pxa168_clk_init()
199 apbc_base + APBC_PWM3, 10, 0, &clk_lock); pxa168_clk_init()
205 apbc_base + APBC_UART0, 4, 3, 0, &clk_lock); pxa168_clk_init()
210 apbc_base + APBC_UART0, 10, 0, &clk_lock); pxa168_clk_init()
216 apbc_base + APBC_UART1, 4, 3, 0, &clk_lock); pxa168_clk_init()
221 apbc_base + APBC_UART1, 10, 0, &clk_lock); pxa168_clk_init()
227 apbc_base + APBC_UART2, 4, 3, 0, &clk_lock); pxa168_clk_init()
232 apbc_base + APBC_UART2, 10, 0, &clk_lock); pxa168_clk_init()
238 apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock); pxa168_clk_init()
241 clk = mmp_clk_register_apbc("ssp0", "ssp0_mux", apbc_base + APBC_SSP0, pxa168_clk_init()
248 apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock); pxa168_clk_init()
251 clk = mmp_clk_register_apbc("ssp1", "ssp1_mux", apbc_base + APBC_SSP1, pxa168_clk_init()
258 apbc_base + APBC_SSP2, 4, 3, 0, &clk_lock); pxa168_clk_init()
261 clk = mmp_clk_register_apbc("ssp2", "ssp1_mux", apbc_base + APBC_SSP2, pxa168_clk_init()
268 apbc_base + APBC_SSP3, 4, 3, 0, &clk_lock); pxa168_clk_init()
271 clk = mmp_clk_register_apbc("ssp3", "ssp1_mux", apbc_base + APBC_SSP3, pxa168_clk_init()
278 apbc_base + APBC_SSP4, 4, 3, 0, &clk_lock); pxa168_clk_init()
281 clk = mmp_clk_register_apbc("ssp4", "ssp1_mux", apbc_base + APBC_SSP4, pxa168_clk_init()
H A Dclk-mmp2.c83 void __iomem *apbc_base; mmp2_clk_init() local
97 apbc_base = ioremap(APB_PHYS_BASE + 0x15000, SZ_4K); mmp2_clk_init()
98 if (apbc_base == NULL) { mmp2_clk_init()
198 apbc_base + APBC_TWSI0, 10, 0, &clk_lock); mmp2_clk_init()
202 apbc_base + APBC_TWSI1, 10, 0, &clk_lock); mmp2_clk_init()
206 apbc_base + APBC_TWSI2, 10, 0, &clk_lock); mmp2_clk_init()
210 apbc_base + APBC_TWSI3, 10, 0, &clk_lock); mmp2_clk_init()
214 apbc_base + APBC_TWSI4, 10, 0, &clk_lock); mmp2_clk_init()
218 apbc_base + APBC_TWSI5, 10, 0, &clk_lock); mmp2_clk_init()
222 apbc_base + APBC_GPIO, 10, 0, &clk_lock); mmp2_clk_init()
226 apbc_base + APBC_KPC, 10, 0, &clk_lock); mmp2_clk_init()
230 apbc_base + APBC_RTC, 10, 0, &clk_lock); mmp2_clk_init()
234 apbc_base + APBC_PWM0, 10, 0, &clk_lock); mmp2_clk_init()
238 apbc_base + APBC_PWM1, 10, 0, &clk_lock); mmp2_clk_init()
242 apbc_base + APBC_PWM2, 10, 0, &clk_lock); mmp2_clk_init()
246 apbc_base + APBC_PWM3, 10, 0, &clk_lock); mmp2_clk_init()
252 apbc_base + APBC_UART0, 4, 3, 0, &clk_lock); mmp2_clk_init()
257 apbc_base + APBC_UART0, 10, 0, &clk_lock); mmp2_clk_init()
263 apbc_base + APBC_UART1, 4, 3, 0, &clk_lock); mmp2_clk_init()
268 apbc_base + APBC_UART1, 10, 0, &clk_lock); mmp2_clk_init()
274 apbc_base + APBC_UART2, 4, 3, 0, &clk_lock); mmp2_clk_init()
279 apbc_base + APBC_UART2, 10, 0, &clk_lock); mmp2_clk_init()
285 apbc_base + APBC_UART3, 4, 3, 0, &clk_lock); mmp2_clk_init()
290 apbc_base + APBC_UART3, 10, 0, &clk_lock); mmp2_clk_init()
296 apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock); mmp2_clk_init()
300 apbc_base + APBC_SSP0, 10, 0, &clk_lock); mmp2_clk_init()
306 apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock); mmp2_clk_init()
310 apbc_base + APBC_SSP1, 10, 0, &clk_lock); mmp2_clk_init()
316 apbc_base + APBC_SSP2, 4, 3, 0, &clk_lock); mmp2_clk_init()
320 apbc_base + APBC_SSP2, 10, 0, &clk_lock); mmp2_clk_init()
326 apbc_base + APBC_SSP3, 4, 3, 0, &clk_lock); mmp2_clk_init()
330 apbc_base + APBC_SSP3, 10, 0, &clk_lock); mmp2_clk_init()
H A Dclk-pxa910.c75 void __iomem *apbc_base; pxa910_clk_init() local
95 apbc_base = ioremap(APB_PHYS_BASE + 0x15000, SZ_4K); pxa910_clk_init()
96 if (apbc_base == NULL) { pxa910_clk_init()
172 apbc_base + APBC_TWSI0, 10, 0, &clk_lock); pxa910_clk_init()
180 apbc_base + APBC_GPIO, 10, 0, &clk_lock); pxa910_clk_init()
184 apbc_base + APBC_KPC, 10, 0, &clk_lock); pxa910_clk_init()
188 apbc_base + APBC_RTC, 10, 0, &clk_lock); pxa910_clk_init()
192 apbc_base + APBC_PWM0, 10, 0, &clk_lock); pxa910_clk_init()
196 apbc_base + APBC_PWM1, 10, 0, &clk_lock); pxa910_clk_init()
200 apbc_base + APBC_PWM2, 10, 0, &clk_lock); pxa910_clk_init()
204 apbc_base + APBC_PWM3, 10, 0, &clk_lock); pxa910_clk_init()
210 apbc_base + APBC_UART0, 4, 3, 0, &clk_lock); pxa910_clk_init()
215 apbc_base + APBC_UART0, 10, 0, &clk_lock); pxa910_clk_init()
221 apbc_base + APBC_UART1, 4, 3, 0, &clk_lock); pxa910_clk_init()
226 apbc_base + APBC_UART1, 10, 0, &clk_lock); pxa910_clk_init()
243 apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock); pxa910_clk_init()
247 apbc_base + APBC_SSP0, 10, 0, &clk_lock); pxa910_clk_init()
253 apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock); pxa910_clk_init()
257 apbc_base + APBC_SSP1, 10, 0, &clk_lock); pxa910_clk_init()
H A Dclk-of-pxa910.c54 void __iomem *apbc_base; member in struct:pxa910_clk_unit
169 mmp_register_mux_clks(unit, apbc_mux_clks, pxa_unit->apbc_base, pxa910_apb_periph_clk_init()
175 mmp_register_gate_clks(unit, apbc_gate_clks, pxa_unit->apbc_base, pxa910_apb_periph_clk_init()
251 pxa_unit->apbc_base + apbc_gate_clks[i].offset; pxa910_clk_reset_init()
261 pxa_unit->apbc_base + apbc_gate_clks[i].offset; pxa910_clk_reset_init()
290 pxa_unit->apbc_base = of_iomap(np, 2); pxa910_clk_init()
291 if (!pxa_unit->apbc_base) { pxa910_clk_init()
H A Dclk-of-pxa168.c55 void __iomem *apbc_base; member in struct:pxa168_clk_unit
168 mmp_register_mux_clks(unit, apbc_mux_clks, pxa_unit->apbc_base, pxa168_apb_periph_clk_init()
171 mmp_register_gate_clks(unit, apbc_gate_clks, pxa_unit->apbc_base, pxa168_apb_periph_clk_init()
241 cells[i].reg = pxa_unit->apbc_base + apbc_gate_clks[i].offset; pxa168_clk_reset_init()
270 pxa_unit->apbc_base = of_iomap(np, 2); pxa168_clk_init()
271 if (!pxa_unit->apbc_base) { pxa168_clk_init()
H A Dclk-of-pxa1928.c32 void __iomem *apbc_base; member in struct:pxa1928_clk_unit
135 mmp_register_mux_clks(unit, apbc_mux_clks, pxa_unit->apbc_base, pxa1928_apb_periph_clk_init()
138 mmp_register_gate_clks(unit, apbc_gate_clks, pxa_unit->apbc_base, pxa1928_apb_periph_clk_init()
199 pxa_unit->apbc_base + apbc_gate_clks[i].offset; pxa1928_clk_reset_init()
254 pxa_unit->apbc_base = of_iomap(np, 0); pxa1928_apbc_clk_init()
255 if (!pxa_unit->apbc_base) { pxa1928_apbc_clk_init()
H A Dclk-of-mmp2.c62 void __iomem *apbc_base; member in struct:mmp2_clk_unit
183 mmp_register_mux_clks(unit, apbc_mux_clks, pxa_unit->apbc_base, mmp2_apb_periph_clk_init()
186 mmp_register_gate_clks(unit, apbc_gate_clks, pxa_unit->apbc_base, mmp2_apb_periph_clk_init()
292 cells[i].reg = pxa_unit->apbc_base + apbc_gate_clks[i].offset; mmp2_clk_reset_init()
321 pxa_unit->apbc_base = of_iomap(np, 2); mmp2_clk_init()
322 if (!pxa_unit->apbc_base) { mmp2_clk_init()

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