Searched refs:ae (Results 1 - 55 of 55) sorted by relevance

/linux-4.4.14/drivers/crypto/qat/qat_common/
H A Dqat_hal.c78 #define AE(handle, ae) handle->hal_handle->aes[ae]
112 unsigned char ae, unsigned int ctx_mask) qat_hal_set_live_ctx()
114 AE(handle, ae).live_ctx_mask = ctx_mask; qat_hal_set_live_ctx()
119 unsigned char ae, unsigned int csr, qat_hal_rd_ae_csr()
125 *value = GET_AE_CSR(handle, ae, csr); qat_hal_rd_ae_csr()
126 if (!(GET_AE_CSR(handle, ae, LOCAL_CSR_STATUS) & LCS_STATUS)) qat_hal_rd_ae_csr()
135 unsigned char ae, unsigned int csr, qat_hal_wr_ae_csr()
141 SET_AE_CSR(handle, ae, csr, value); qat_hal_wr_ae_csr()
142 if (!(GET_AE_CSR(handle, ae, LOCAL_CSR_STATUS) & LCS_STATUS)) qat_hal_wr_ae_csr()
151 unsigned char ae, unsigned char ctx, qat_hal_get_wakeup_event()
156 qat_hal_rd_ae_csr(handle, ae, CSR_CTX_POINTER, &cur_ctx); qat_hal_get_wakeup_event()
157 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, ctx); qat_hal_get_wakeup_event()
158 qat_hal_rd_ae_csr(handle, ae, CTX_WAKEUP_EVENTS_INDIRECT, events); qat_hal_get_wakeup_event()
159 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); qat_hal_get_wakeup_event()
163 unsigned char ae, unsigned int cycles, qat_hal_wait_cycles()
171 qat_hal_rd_ae_csr(handle, ae, PROFILE_COUNT, &base_cnt); qat_hal_wait_cycles()
175 qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS, &csr); qat_hal_wait_cycles()
177 qat_hal_rd_ae_csr(handle, ae, PROFILE_COUNT, &cur_cnt); qat_hal_wait_cycles()
199 unsigned char ae, unsigned char mode) qat_hal_set_ae_ctx_mode()
209 qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &csr); qat_hal_set_ae_ctx_mode()
214 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, new_csr); qat_hal_set_ae_ctx_mode()
219 unsigned char ae, unsigned char mode) qat_hal_set_ae_nn_mode()
223 qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &csr); qat_hal_set_ae_nn_mode()
231 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, new_csr); qat_hal_set_ae_nn_mode()
237 unsigned char ae, enum icp_qat_uof_regtype lm_type, qat_hal_set_ae_lm_mode()
242 qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &csr); qat_hal_set_ae_lm_mode()
261 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, new_csr); qat_hal_set_ae_lm_mode()
325 unsigned char ae, unsigned int ctx_mask, qat_hal_wr_indr_csr()
330 qat_hal_rd_ae_csr(handle, ae, CSR_CTX_POINTER, &cur_ctx); qat_hal_wr_indr_csr()
335 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, ctx); qat_hal_wr_indr_csr()
336 qat_hal_wr_ae_csr(handle, ae, ae_csr, csr_val); qat_hal_wr_indr_csr()
339 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); qat_hal_wr_indr_csr()
343 unsigned char ae, unsigned char ctx, qat_hal_rd_indr_csr()
348 qat_hal_rd_ae_csr(handle, ae, CSR_CTX_POINTER, &cur_ctx); qat_hal_rd_indr_csr()
349 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, ctx); qat_hal_rd_indr_csr()
350 qat_hal_rd_ae_csr(handle, ae, ae_csr, csr_val); qat_hal_rd_indr_csr()
351 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); qat_hal_rd_indr_csr()
355 unsigned char ae, unsigned int ctx_mask, qat_hal_put_sig_event()
360 qat_hal_rd_ae_csr(handle, ae, CSR_CTX_POINTER, &cur_ctx); qat_hal_put_sig_event()
364 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, ctx); qat_hal_put_sig_event()
365 qat_hal_wr_ae_csr(handle, ae, CTX_SIG_EVENTS_INDIRECT, events); qat_hal_put_sig_event()
367 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); qat_hal_put_sig_event()
371 unsigned char ae, unsigned int ctx_mask, qat_hal_put_wakeup_event()
376 qat_hal_rd_ae_csr(handle, ae, CSR_CTX_POINTER, &cur_ctx); qat_hal_put_wakeup_event()
380 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, ctx); qat_hal_put_wakeup_event()
381 qat_hal_wr_ae_csr(handle, ae, CTX_WAKEUP_EVENTS_INDIRECT, qat_hal_put_wakeup_event()
384 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); qat_hal_put_wakeup_event()
390 unsigned char ae; qat_hal_check_ae_alive() local
393 for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { qat_hal_check_ae_alive()
394 if (!(handle->hal_handle->ae_mask & (1 << ae))) qat_hal_check_ae_alive()
397 qat_hal_rd_ae_csr(handle, ae, PROFILE_COUNT, qat_hal_check_ae_alive()
402 qat_hal_rd_ae_csr(handle, ae, PROFILE_COUNT, qat_hal_check_ae_alive()
408 pr_err("QAT: AE%d is inactive!!\n", ae); qat_hal_check_ae_alive()
419 unsigned char ae; qat_hal_reset_timestamp() local
427 for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { qat_hal_reset_timestamp()
428 if (!(handle->hal_handle->ae_mask & (1 << ae))) qat_hal_reset_timestamp()
430 qat_hal_wr_ae_csr(handle, ae, TIMESTAMP_LOW, 0); qat_hal_reset_timestamp()
431 qat_hal_wr_ae_csr(handle, ae, TIMESTAMP_HIGH, 0); qat_hal_reset_timestamp()
470 unsigned char ae; qat_hal_clr_reset() local
495 for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { qat_hal_clr_reset()
496 if (!(handle->hal_handle->ae_mask & (1 << ae))) qat_hal_clr_reset()
498 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, qat_hal_clr_reset()
500 qat_hal_wr_indr_csr(handle, ae, ICP_QAT_UCLO_AE_ALL_CTX, qat_hal_clr_reset()
504 qat_hal_wr_ae_csr(handle, ae, CTX_ARB_CNTL, INIT_CTX_ARB_VALUE); qat_hal_clr_reset()
505 qat_hal_wr_ae_csr(handle, ae, CC_ENABLE, INIT_CCENABLE_VALUE); qat_hal_clr_reset()
506 qat_hal_put_wakeup_event(handle, ae, qat_hal_clr_reset()
509 qat_hal_put_sig_event(handle, ae, qat_hal_clr_reset()
526 unsigned char ae, unsigned int ctx_mask) qat_hal_disable_ctx()
530 qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &ctx); qat_hal_disable_ctx()
533 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx); qat_hal_disable_ctx()
567 unsigned char ae, unsigned int uaddr, qat_hal_wr_uwords()
573 qat_hal_rd_ae_csr(handle, ae, USTORE_ADDRESS, &ustore_addr); qat_hal_wr_uwords()
575 qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, uaddr); qat_hal_wr_uwords()
583 qat_hal_wr_ae_csr(handle, ae, USTORE_DATA_LOWER, uwrd_lo); qat_hal_wr_uwords()
584 qat_hal_wr_ae_csr(handle, ae, USTORE_DATA_UPPER, uwrd_hi); qat_hal_wr_uwords()
586 qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, ustore_addr); qat_hal_wr_uwords()
590 unsigned char ae, unsigned int ctx_mask) qat_hal_enable_ctx()
594 qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &ctx); qat_hal_enable_ctx()
598 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx); qat_hal_enable_ctx()
603 unsigned char ae; qat_hal_clear_gpr() local
611 for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { qat_hal_clear_gpr()
612 if (!(handle->hal_handle->ae_mask & (1 << ae))) qat_hal_clear_gpr()
615 qat_hal_init_rd_xfer(handle, ae, 0, ICP_SR_RD_ABS, qat_hal_clear_gpr()
617 qat_hal_init_rd_xfer(handle, ae, 0, ICP_DR_RD_ABS, qat_hal_clear_gpr()
620 qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val); qat_hal_clear_gpr()
622 qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, csr_val); qat_hal_clear_gpr()
623 qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &csr_val); qat_hal_clear_gpr()
626 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, csr_val); qat_hal_clear_gpr()
627 qat_hal_wr_uwords(handle, ae, 0, ARRAY_SIZE(inst), qat_hal_clear_gpr()
629 qat_hal_wr_indr_csr(handle, ae, ctx_mask, CTX_STS_INDIRECT, qat_hal_clear_gpr()
632 qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS, &savctx); qat_hal_clear_gpr()
633 qat_hal_wr_ae_csr(handle, ae, ACTIVE_CTX_STATUS, 0); qat_hal_clear_gpr()
634 qat_hal_put_wakeup_event(handle, ae, ctx_mask, XCWE_VOLUNTARY); qat_hal_clear_gpr()
635 qat_hal_wr_indr_csr(handle, ae, ctx_mask, qat_hal_clear_gpr()
637 qat_hal_wr_ae_csr(handle, ae, CTX_SIG_EVENTS_ACTIVE, 0); qat_hal_clear_gpr()
638 qat_hal_enable_ctx(handle, ae, ctx_mask); qat_hal_clear_gpr()
640 for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { qat_hal_clear_gpr()
641 if (!(handle->hal_handle->ae_mask & (1 << ae))) qat_hal_clear_gpr()
645 ret = qat_hal_wait_cycles(handle, ae, 20, 1); qat_hal_clear_gpr()
649 pr_err("QAT: clear GPR of AE %d failed", ae); qat_hal_clear_gpr()
652 qat_hal_disable_ctx(handle, ae, ctx_mask); qat_hal_clear_gpr()
653 qat_hal_wr_ae_csr(handle, ae, ACTIVE_CTX_STATUS, qat_hal_clear_gpr()
655 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, qat_hal_clear_gpr()
657 qat_hal_wr_indr_csr(handle, ae, ctx_mask, CTX_STS_INDIRECT, qat_hal_clear_gpr()
660 qat_hal_wr_ae_csr(handle, ae, CTX_ARB_CNTL, INIT_CTX_ARB_VALUE); qat_hal_clear_gpr()
661 qat_hal_wr_ae_csr(handle, ae, CC_ENABLE, INIT_CCENABLE_VALUE); qat_hal_clear_gpr()
662 qat_hal_put_wakeup_event(handle, ae, ctx_mask, qat_hal_clear_gpr()
664 qat_hal_put_sig_event(handle, ae, ctx_mask, qat_hal_clear_gpr()
676 unsigned char ae; qat_hal_init() local
708 for (ae = 0; ae < ICP_QAT_UCLO_MAX_AE; ae++) { qat_hal_init()
709 if (!(hw_data->ae_mask & (1 << ae))) qat_hal_init()
711 handle->hal_handle->aes[ae].free_addr = 0; qat_hal_init()
712 handle->hal_handle->aes[ae].free_size = qat_hal_init()
714 handle->hal_handle->aes[ae].ustore_size = qat_hal_init()
716 handle->hal_handle->aes[ae].live_ctx_mask = qat_hal_init()
718 max_en_ae_id = ae; qat_hal_init()
729 for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { qat_hal_init()
732 if (!(hw_data->ae_mask & (1 << ae))) qat_hal_init()
734 qat_hal_rd_ae_csr(handle, ae, SIGNATURE_ENABLE, &csr_val); qat_hal_init()
736 qat_hal_wr_ae_csr(handle, ae, SIGNATURE_ENABLE, csr_val); qat_hal_init()
756 void qat_hal_start(struct icp_qat_fw_loader_handle *handle, unsigned char ae, qat_hal_start() argument
759 qat_hal_put_wakeup_event(handle, ae, (~ctx_mask) & qat_hal_start()
761 qat_hal_enable_ctx(handle, ae, ctx_mask); qat_hal_start()
764 void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae, qat_hal_stop() argument
767 qat_hal_disable_ctx(handle, ae, ctx_mask); qat_hal_stop()
771 unsigned char ae, unsigned int ctx_mask, unsigned int upc) qat_hal_set_pc()
773 qat_hal_wr_indr_csr(handle, ae, ctx_mask, CTX_STS_INDIRECT, qat_hal_set_pc()
778 unsigned char ae, unsigned int uaddr, qat_hal_get_uwords()
784 qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &misc_control); qat_hal_get_uwords()
785 qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, qat_hal_get_uwords()
787 qat_hal_rd_ae_csr(handle, ae, USTORE_ADDRESS, &ustore_addr); qat_hal_get_uwords()
790 qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, uaddr); qat_hal_get_uwords()
792 qat_hal_rd_ae_csr(handle, ae, USTORE_DATA_LOWER, &uwrd_lo); qat_hal_get_uwords()
793 qat_hal_rd_ae_csr(handle, ae, USTORE_DATA_UPPER, &uwrd_hi); qat_hal_get_uwords()
797 qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, misc_control); qat_hal_get_uwords()
798 qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, ustore_addr); qat_hal_get_uwords()
802 unsigned char ae, unsigned int uaddr, qat_hal_wr_umem()
807 qat_hal_rd_ae_csr(handle, ae, USTORE_ADDRESS, &ustore_addr); qat_hal_wr_umem()
809 qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, uaddr); qat_hal_wr_umem()
820 qat_hal_wr_ae_csr(handle, ae, USTORE_DATA_LOWER, uwrd_lo); qat_hal_wr_umem()
821 qat_hal_wr_ae_csr(handle, ae, USTORE_DATA_UPPER, uwrd_hi); qat_hal_wr_umem()
823 qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, ustore_addr); qat_hal_wr_umem()
828 unsigned char ae, unsigned char ctx, qat_hal_exec_micro_inst()
848 qat_hal_rd_indr_csr(handle, ae, ctx, LM_ADDR_0_INDIRECT, &ind_lm_addr0); qat_hal_exec_micro_inst()
849 qat_hal_rd_indr_csr(handle, ae, ctx, LM_ADDR_1_INDIRECT, &ind_lm_addr1); qat_hal_exec_micro_inst()
850 qat_hal_rd_indr_csr(handle, ae, ctx, INDIRECT_LM_ADDR_0_BYTE_INDEX, qat_hal_exec_micro_inst()
852 qat_hal_rd_indr_csr(handle, ae, ctx, INDIRECT_LM_ADDR_1_BYTE_INDEX, qat_hal_exec_micro_inst()
855 qat_hal_get_uwords(handle, ae, 0, inst_num, savuwords); qat_hal_exec_micro_inst()
856 qat_hal_get_wakeup_event(handle, ae, ctx, &wakeup_events); qat_hal_exec_micro_inst()
857 qat_hal_rd_indr_csr(handle, ae, ctx, CTX_STS_INDIRECT, &savpc); qat_hal_exec_micro_inst()
859 qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &ctx_enables); qat_hal_exec_micro_inst()
861 qat_hal_rd_ae_csr(handle, ae, CC_ENABLE, &savcc); qat_hal_exec_micro_inst()
862 qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS, &savctx); qat_hal_exec_micro_inst()
863 qat_hal_rd_ae_csr(handle, ae, CTX_ARB_CNTL, &ctxarb_ctl); qat_hal_exec_micro_inst()
864 qat_hal_rd_indr_csr(handle, ae, ctx, FUTURE_COUNT_SIGNAL_INDIRECT, qat_hal_exec_micro_inst()
866 qat_hal_rd_indr_csr(handle, ae, ctx, CTX_SIG_EVENTS_INDIRECT, &ind_sig); qat_hal_exec_micro_inst()
867 qat_hal_rd_ae_csr(handle, ae, CTX_SIG_EVENTS_ACTIVE, &act_sig); qat_hal_exec_micro_inst()
869 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables); qat_hal_exec_micro_inst()
870 qat_hal_wr_uwords(handle, ae, 0, inst_num, micro_inst); qat_hal_exec_micro_inst()
871 qat_hal_wr_indr_csr(handle, ae, (1 << ctx), CTX_STS_INDIRECT, 0); qat_hal_exec_micro_inst()
872 qat_hal_wr_ae_csr(handle, ae, ACTIVE_CTX_STATUS, ctx & ACS_ACNO); qat_hal_exec_micro_inst()
874 qat_hal_wr_ae_csr(handle, ae, CC_ENABLE, savcc & 0xffffdfff); qat_hal_exec_micro_inst()
875 qat_hal_put_wakeup_event(handle, ae, (1 << ctx), XCWE_VOLUNTARY); qat_hal_exec_micro_inst()
876 qat_hal_wr_indr_csr(handle, ae, (1 << ctx), CTX_SIG_EVENTS_INDIRECT, 0); qat_hal_exec_micro_inst()
877 qat_hal_wr_ae_csr(handle, ae, CTX_SIG_EVENTS_ACTIVE, 0); qat_hal_exec_micro_inst()
878 qat_hal_enable_ctx(handle, ae, (1 << ctx)); qat_hal_exec_micro_inst()
880 if (qat_hal_wait_cycles(handle, ae, max_cycle, 1) != 0) qat_hal_exec_micro_inst()
885 qat_hal_rd_indr_csr(handle, ae, ctx, CTX_STS_INDIRECT, qat_hal_exec_micro_inst()
890 qat_hal_disable_ctx(handle, ae, (1 << ctx)); qat_hal_exec_micro_inst()
892 qat_hal_wr_uwords(handle, ae, 0, inst_num, savuwords); qat_hal_exec_micro_inst()
893 qat_hal_put_wakeup_event(handle, ae, (1 << ctx), wakeup_events); qat_hal_exec_micro_inst()
894 qat_hal_wr_indr_csr(handle, ae, (1 << ctx), CTX_STS_INDIRECT, qat_hal_exec_micro_inst()
896 qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val); qat_hal_exec_micro_inst()
898 qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, newcsr_val); qat_hal_exec_micro_inst()
899 qat_hal_wr_ae_csr(handle, ae, CC_ENABLE, savcc); qat_hal_exec_micro_inst()
900 qat_hal_wr_ae_csr(handle, ae, ACTIVE_CTX_STATUS, savctx & ACS_ACNO); qat_hal_exec_micro_inst()
901 qat_hal_wr_ae_csr(handle, ae, CTX_ARB_CNTL, ctxarb_ctl); qat_hal_exec_micro_inst()
902 qat_hal_wr_indr_csr(handle, ae, (1 << ctx), qat_hal_exec_micro_inst()
904 qat_hal_wr_indr_csr(handle, ae, (1 << ctx), qat_hal_exec_micro_inst()
906 qat_hal_wr_indr_csr(handle, ae, (1 << ctx), qat_hal_exec_micro_inst()
908 qat_hal_wr_indr_csr(handle, ae, (1 << ctx), qat_hal_exec_micro_inst()
910 qat_hal_wr_indr_csr(handle, ae, (1 << ctx), qat_hal_exec_micro_inst()
912 qat_hal_wr_indr_csr(handle, ae, (1 << ctx), qat_hal_exec_micro_inst()
914 qat_hal_wr_ae_csr(handle, ae, CTX_SIG_EVENTS_ACTIVE, act_sig); qat_hal_exec_micro_inst()
915 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables); qat_hal_exec_micro_inst()
921 unsigned char ae, unsigned char ctx, qat_hal_rd_rel_reg()
944 qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS, &savctx); qat_hal_rd_rel_reg()
945 qat_hal_rd_ae_csr(handle, ae, CTX_ARB_CNTL, &ctxarb_cntl); qat_hal_rd_rel_reg()
946 qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &ctx_enables); qat_hal_rd_rel_reg()
949 qat_hal_wr_ae_csr(handle, ae, ACTIVE_CTX_STATUS, qat_hal_rd_rel_reg()
951 qat_hal_get_uwords(handle, ae, 0, 1, &savuword); qat_hal_rd_rel_reg()
952 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables); qat_hal_rd_rel_reg()
953 qat_hal_rd_ae_csr(handle, ae, USTORE_ADDRESS, &ustore_addr); qat_hal_rd_rel_reg()
955 qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, uaddr); qat_hal_rd_rel_reg()
959 qat_hal_wr_ae_csr(handle, ae, USTORE_DATA_LOWER, uwrd_lo); qat_hal_rd_rel_reg()
960 qat_hal_wr_ae_csr(handle, ae, USTORE_DATA_UPPER, uwrd_hi); qat_hal_rd_rel_reg()
961 qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, uaddr); qat_hal_rd_rel_reg()
963 qat_hal_wait_cycles(handle, ae, 0x8, 0); qat_hal_rd_rel_reg()
969 qat_hal_rd_ae_csr(handle, ae, ALU_OUT, data); qat_hal_rd_rel_reg()
970 qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, ustore_addr); qat_hal_rd_rel_reg()
971 qat_hal_wr_uwords(handle, ae, 0, 1, &savuword); qat_hal_rd_rel_reg()
973 qat_hal_wr_ae_csr(handle, ae, ACTIVE_CTX_STATUS, qat_hal_rd_rel_reg()
975 qat_hal_wr_ae_csr(handle, ae, CTX_ARB_CNTL, ctxarb_cntl); qat_hal_rd_rel_reg()
976 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables); qat_hal_rd_rel_reg()
982 unsigned char ae, unsigned char ctx, qat_hal_wr_rel_reg()
1024 return qat_hal_exec_micro_inst(handle, ae, ctx, insts, num_inst, qat_hal_wr_rel_reg()
1063 unsigned char ae, unsigned char ctx, qat_hal_exec_micro_init_lm()
1072 qat_hal_rd_rel_reg(handle, ae, ctx, ICP_GPA_REL, 0, &gpra0); qat_hal_exec_micro_init_lm()
1073 qat_hal_rd_rel_reg(handle, ae, ctx, ICP_GPA_REL, 0x1, &gpra1); qat_hal_exec_micro_init_lm()
1074 qat_hal_rd_rel_reg(handle, ae, ctx, ICP_GPA_REL, 0x2, &gpra2); qat_hal_exec_micro_init_lm()
1075 qat_hal_rd_rel_reg(handle, ae, ctx, ICP_GPB_REL, 0, &gprb0); qat_hal_exec_micro_init_lm()
1076 qat_hal_rd_rel_reg(handle, ae, ctx, ICP_GPB_REL, 0x1, &gprb1); qat_hal_exec_micro_init_lm()
1079 stat = qat_hal_exec_micro_inst(handle, ae, ctx, micro_inst, inst_num, 1, qat_hal_exec_micro_init_lm()
1083 qat_hal_wr_rel_reg(handle, ae, ctx, ICP_GPA_REL, 0, gpra0); qat_hal_exec_micro_init_lm()
1084 qat_hal_wr_rel_reg(handle, ae, ctx, ICP_GPA_REL, 0x1, gpra1); qat_hal_exec_micro_init_lm()
1085 qat_hal_wr_rel_reg(handle, ae, ctx, ICP_GPA_REL, 0x2, gpra2); qat_hal_exec_micro_init_lm()
1086 qat_hal_wr_rel_reg(handle, ae, ctx, ICP_GPB_REL, 0, gprb0); qat_hal_exec_micro_init_lm()
1087 qat_hal_wr_rel_reg(handle, ae, ctx, ICP_GPB_REL, 0x1, gprb1); qat_hal_exec_micro_init_lm()
1093 unsigned char ae, qat_hal_batch_wr_lm()
1115 ae = plm_init->ae; qat_hal_batch_wr_lm()
1127 stat = qat_hal_exec_micro_init_lm(handle, ae, 0, &first_exec, qat_hal_batch_wr_lm()
1136 unsigned char ae, unsigned char ctx, qat_hal_put_rel_rd_xfer()
1146 status = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &ctx_enables); qat_hal_put_rel_rd_xfer()
1163 SET_AE_XFER(handle, ae, reg_addr, val); qat_hal_put_rel_rd_xfer()
1167 SET_AE_XFER(handle, ae, (reg_addr + dr_offset), val); qat_hal_put_rel_rd_xfer()
1177 unsigned char ae, unsigned char ctx, qat_hal_put_rel_wr_xfer()
1196 qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &ctx_enables); qat_hal_put_rel_wr_xfer()
1213 qat_hal_rd_rel_reg(handle, ae, ctx, ICP_GPB_REL, gprnum, &gprval); qat_hal_put_rel_wr_xfer()
1227 status = qat_hal_exec_micro_inst(handle, ae, ctx, micro_inst, num_inst, qat_hal_put_rel_wr_xfer()
1229 qat_hal_wr_rel_reg(handle, ae, ctx, ICP_GPB_REL, gprnum, gprval); qat_hal_put_rel_wr_xfer()
1234 unsigned char ae, unsigned char ctx, qat_hal_put_rel_nn()
1240 qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &ctx_enables); qat_hal_put_rel_nn()
1242 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables | CE_NN_MODE); qat_hal_put_rel_nn()
1244 stat = qat_hal_put_rel_wr_xfer(handle, ae, ctx, ICP_NEIGH_REL, nn, val); qat_hal_put_rel_nn()
1245 qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables); qat_hal_put_rel_nn()
1250 *handle, unsigned char ae, qat_hal_convert_abs_to_rel()
1257 qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &ctx_enables); qat_hal_convert_abs_to_rel()
1271 unsigned char ae, unsigned char ctx_mask, qat_hal_init_gpr()
1285 qat_hal_convert_abs_to_rel(handle, ae, reg_num, &reg, qat_hal_init_gpr()
1294 stat = qat_hal_wr_rel_reg(handle, ae, ctx, type, reg, regdata); qat_hal_init_gpr()
1305 unsigned char ae, unsigned char ctx_mask, qat_hal_init_wr_xfer()
1319 qat_hal_convert_abs_to_rel(handle, ae, reg_num, &reg, qat_hal_init_wr_xfer()
1328 stat = qat_hal_put_rel_wr_xfer(handle, ae, ctx, type, reg, qat_hal_init_wr_xfer()
1340 unsigned char ae, unsigned char ctx_mask, qat_hal_init_rd_xfer()
1354 qat_hal_convert_abs_to_rel(handle, ae, reg_num, &reg, qat_hal_init_rd_xfer()
1363 stat = qat_hal_put_rel_rd_xfer(handle, ae, ctx, type, reg, qat_hal_init_rd_xfer()
1375 unsigned char ae, unsigned char ctx_mask, qat_hal_init_nn()
1387 stat = qat_hal_put_rel_nn(handle, ae, ctx, reg_num, regdata); qat_hal_init_nn()
111 qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int ctx_mask) qat_hal_set_live_ctx() argument
118 qat_hal_rd_ae_csr(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int csr, unsigned int *value) qat_hal_rd_ae_csr() argument
134 qat_hal_wr_ae_csr(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int csr, unsigned int value) qat_hal_wr_ae_csr() argument
150 qat_hal_get_wakeup_event(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, unsigned int *events) qat_hal_get_wakeup_event() argument
162 qat_hal_wait_cycles(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int cycles, int chk_inactive) qat_hal_wait_cycles() argument
198 qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char mode) qat_hal_set_ae_ctx_mode() argument
218 qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char mode) qat_hal_set_ae_nn_mode() argument
236 qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle, unsigned char ae, enum icp_qat_uof_regtype lm_type, unsigned char mode) qat_hal_set_ae_lm_mode() argument
324 qat_hal_wr_indr_csr(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int ctx_mask, unsigned int ae_csr, unsigned int csr_val) qat_hal_wr_indr_csr() argument
342 qat_hal_rd_indr_csr(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, unsigned int ae_csr, unsigned int *csr_val) qat_hal_rd_indr_csr() argument
354 qat_hal_put_sig_event(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int ctx_mask, unsigned int events) qat_hal_put_sig_event() argument
370 qat_hal_put_wakeup_event(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int ctx_mask, unsigned int events) qat_hal_put_wakeup_event() argument
525 qat_hal_disable_ctx(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int ctx_mask) qat_hal_disable_ctx() argument
566 qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int uaddr, unsigned int words_num, uint64_t *uword) qat_hal_wr_uwords() argument
589 qat_hal_enable_ctx(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int ctx_mask) qat_hal_enable_ctx() argument
770 qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int ctx_mask, unsigned int upc) qat_hal_set_pc() argument
777 qat_hal_get_uwords(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int uaddr, unsigned int words_num, uint64_t *uword) qat_hal_get_uwords() argument
801 qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int uaddr, unsigned int words_num, unsigned int *data) qat_hal_wr_umem() argument
827 qat_hal_exec_micro_inst(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, uint64_t *micro_inst, unsigned int inst_num, int code_off, unsigned int max_cycle, unsigned int *endpc) qat_hal_exec_micro_inst() argument
920 qat_hal_rd_rel_reg(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int *data) qat_hal_rd_rel_reg() argument
981 qat_hal_wr_rel_reg(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int data) qat_hal_wr_rel_reg() argument
1062 qat_hal_exec_micro_init_lm(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, int *pfirst_exec, uint64_t *micro_inst, unsigned int inst_num) qat_hal_exec_micro_init_lm() argument
1092 qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle, unsigned char ae, struct icp_qat_uof_batch_init *lm_init_header) qat_hal_batch_wr_lm() argument
1135 qat_hal_put_rel_rd_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int val) qat_hal_put_rel_rd_xfer() argument
1176 qat_hal_put_rel_wr_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int data) qat_hal_put_rel_wr_xfer() argument
1233 qat_hal_put_rel_nn(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, unsigned short nn, unsigned int val) qat_hal_put_rel_nn() argument
1249 qat_hal_convert_abs_to_rel(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned short absreg_num, unsigned short *relreg, unsigned char *ctx) qat_hal_convert_abs_to_rel() argument
1270 qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int regdata) qat_hal_init_gpr() argument
1304 qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int regdata) qat_hal_init_wr_xfer() argument
1339 qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int regdata) qat_hal_init_rd_xfer() argument
1374 qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx_mask, unsigned short reg_num, unsigned int regdata) qat_hal_init_nn() argument
H A Dqat_uclo.c63 unsigned int ae, unsigned int image_num) qat_uclo_init_ae_data()
70 ae_data = &obj_handle->ae_data[ae]; qat_uclo_init_ae_data()
159 unsigned char ae, unsigned int addr, qat_uclo_wr_umem_by_words()
170 qat_hal_wr_umem(handle, ae, addr++, 1, &outval); qat_uclo_wr_umem_by_words()
177 unsigned char ae, qat_uclo_batch_wr_umem()
189 ae = umem_init->ae; qat_uclo_batch_wr_umem()
193 qat_uclo_wr_umem_by_words(handle, ae, addr, value, size); qat_uclo_batch_wr_umem()
218 unsigned long ae = 0; qat_uclo_parse_num() local
228 if ((kstrtoul(buf, 10, &ae))) qat_uclo_parse_num()
231 *num = (unsigned int)ae; qat_uclo_parse_num()
237 unsigned int size_range, unsigned int *ae) qat_uclo_fetch_initmem_ae()
255 if (qat_uclo_parse_num(str, ae)) { qat_uclo_fetch_initmem_ae()
259 if (*ae >= ICP_QAT_UCLO_MAX_AE) { qat_uclo_fetch_initmem_ae()
260 pr_err("QAT: ae %d out of range\n", *ae); qat_uclo_fetch_initmem_ae()
268 *init_mem, unsigned int ae, qat_uclo_create_batch_init_list()
298 mem_init->ae = ae; qat_uclo_create_batch_init_list()
324 unsigned int ae; qat_uclo_init_lmem_seg() local
327 ICP_QAT_UCLO_MAX_LMEM_REG, &ae)) qat_uclo_init_lmem_seg()
329 if (qat_uclo_create_batch_init_list(handle, init_mem, ae, qat_uclo_init_lmem_seg()
330 &obj_handle->lm_init_tab[ae])) qat_uclo_init_lmem_seg()
339 unsigned int ae, ustore_size, uaddr, i; qat_uclo_init_umem_seg() local
342 if (qat_uclo_fetch_initmem_ae(handle, init_mem, ustore_size, &ae)) qat_uclo_init_umem_seg()
344 if (qat_uclo_create_batch_init_list(handle, init_mem, ae, qat_uclo_init_umem_seg()
345 &obj_handle->umem_init_tab[ae])) qat_uclo_init_umem_seg()
349 for (i = 0; i < obj_handle->ae_data[ae].slice_num; i++) { qat_uclo_init_umem_seg()
350 if (obj_handle->ae_data[ae].ae_slices[i]. qat_uclo_init_umem_seg()
352 obj_handle->ae_data[ae].ae_slices[i]. qat_uclo_init_umem_seg()
385 unsigned char ae; qat_uclo_init_ustore() local
401 for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { qat_uclo_init_ustore()
402 if (!test_bit(ae, (unsigned long *)&uof_image->ae_assigned)) qat_uclo_init_ustore()
404 ustore_size = obj_handle->ae_data[ae].eff_ustore_size; qat_uclo_init_ustore()
407 qat_hal_wr_uwords(handle, (unsigned char)ae, 0, qat_uclo_init_ustore()
409 qat_hal_wr_uwords(handle, (unsigned char)ae, patt_pos, qat_uclo_init_ustore()
419 int i, ae; qat_uclo_init_memory() local
434 for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { qat_uclo_init_memory()
435 if (qat_hal_batch_wr_lm(handle, ae, qat_uclo_init_memory()
436 obj_handle->lm_init_tab[ae])) { qat_uclo_init_memory()
437 pr_err("QAT: fail to batch init lmem for AE %d\n", ae); qat_uclo_init_memory()
441 &obj_handle->lm_init_tab[ae]); qat_uclo_init_memory()
442 qat_uclo_batch_wr_umem(handle, ae, qat_uclo_init_memory()
443 obj_handle->umem_init_tab[ae]); qat_uclo_init_memory()
446 umem_init_tab[ae]); qat_uclo_init_memory()
662 int i, ae; qat_uclo_map_ae() local
666 for (ae = 0; ae <= max_ae; ae++) { qat_uclo_map_ae()
667 if (!test_bit(ae, qat_uclo_map_ae()
671 if (!test_bit(ae, (unsigned long *) qat_uclo_map_ae()
675 if (qat_uclo_init_ae_data(obj_handle, ae, i)) qat_uclo_map_ae()
743 unsigned char ae, unsigned char ctx_mask, qat_uclo_init_reg()
753 return qat_hal_init_gpr(handle, ae, ctx_mask, reg_type, qat_uclo_init_reg()
764 return qat_hal_init_rd_xfer(handle, ae, ctx_mask, reg_type, qat_uclo_init_reg()
771 return qat_hal_init_wr_xfer(handle, ae, ctx_mask, reg_type, qat_uclo_init_reg()
774 return qat_hal_init_nn(handle, ae, ctx_mask, reg_addr, value); qat_uclo_init_reg()
783 unsigned int ae, qat_uclo_init_reg_sym()
803 qat_uclo_init_reg(handle, ae, ctx_mask, qat_uclo_init_reg_sym()
816 qat_uclo_init_reg(handle, ae, qat_uclo_init_reg_sym()
840 unsigned int s, ae; qat_uclo_init_globals() local
850 for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { qat_uclo_init_globals()
851 for (s = 0; s < obj_handle->ae_data[ae].slice_num; s++) { qat_uclo_init_globals()
852 if (!obj_handle->ae_data[ae].ae_slices[s].encap_image) qat_uclo_init_globals()
854 if (qat_uclo_init_reg_sym(handle, ae, qat_uclo_init_globals()
855 obj_handle->ae_data[ae]. qat_uclo_init_globals()
866 unsigned char ae, nn_mode, s; qat_uclo_set_ae_mode() local
871 for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { qat_uclo_set_ae_mode()
872 if (!test_bit(ae, qat_uclo_set_ae_mode()
875 ae_data = &obj_handle->ae_data[ae]; qat_uclo_set_ae_mode()
878 if (!obj_handle->ae_data[ae].ae_slices[s].encap_image) qat_uclo_set_ae_mode()
881 if (qat_hal_set_ae_ctx_mode(handle, ae, qat_uclo_set_ae_mode()
888 if (qat_hal_set_ae_nn_mode(handle, ae, nn_mode)) { qat_uclo_set_ae_mode()
892 if (qat_hal_set_ae_lm_mode(handle, ae, ICP_LMEM0, qat_uclo_set_ae_mode()
898 if (qat_hal_set_ae_lm_mode(handle, ae, ICP_LMEM1, qat_uclo_set_ae_mode()
925 unsigned int ae; qat_uclo_parse_uof_obj() local
965 for (ae = 0; ae < obj_handle->uimage_num; ae++) qat_uclo_parse_uof_obj()
966 kfree(obj_handle->ae_uimage[ae].page); qat_uclo_parse_uof_obj()
1071 *encap_page, unsigned int ae) qat_uclo_wr_uimage_raw_page()
1098 qat_hal_wr_uwords(handle, (unsigned char)ae, qat_uclo_wr_uimage_raw_page()
1114 unsigned char ae; qat_uclo_wr_uimage_page() local
1123 for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { qat_uclo_wr_uimage_page()
1124 if (!test_bit(ae, (unsigned long *)&image->ae_assigned)) qat_uclo_wr_uimage_page()
1127 for (s = 0; s < obj_handle->ae_data[ae].slice_num; s++) { qat_uclo_wr_uimage_page()
1128 if (image->ctx_assigned & obj_handle->ae_data[ae]. qat_uclo_wr_uimage_page()
1132 if (s >= obj_handle->ae_data[ae].slice_num) qat_uclo_wr_uimage_page()
1134 page = obj_handle->ae_data[ae].ae_slices[s].page; qat_uclo_wr_uimage_page()
1137 qat_uclo_wr_uimage_raw_page(handle, page->encap_page, ae); qat_uclo_wr_uimage_page()
1139 page = obj_handle->ae_data[ae].ae_slices[s].page; qat_uclo_wr_uimage_page()
1141 obj_handle->ae_data[ae].ae_slices[s].cur_page[ctx] = qat_uclo_wr_uimage_page()
1143 qat_hal_set_live_ctx(handle, (unsigned char)ae, qat_uclo_wr_uimage_page()
1145 qat_hal_set_pc(handle, (unsigned char)ae, image->ctx_assigned, qat_uclo_wr_uimage_page()
62 qat_uclo_init_ae_data(struct icp_qat_uclo_objhandle *obj_handle, unsigned int ae, unsigned int image_num) qat_uclo_init_ae_data() argument
158 qat_uclo_wr_umem_by_words(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned int addr, unsigned int *val, unsigned int num_in_bytes) qat_uclo_wr_umem_by_words() argument
176 qat_uclo_batch_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae, struct icp_qat_uof_batch_init *umem_init_header) qat_uclo_batch_wr_umem() argument
235 qat_uclo_fetch_initmem_ae(struct icp_qat_fw_loader_handle *handle, struct icp_qat_uof_initmem *init_mem, unsigned int size_range, unsigned int *ae) qat_uclo_fetch_initmem_ae() argument
266 qat_uclo_create_batch_init_list(struct icp_qat_fw_loader_handle *handle, struct icp_qat_uof_initmem *init_mem, unsigned int ae, struct icp_qat_uof_batch_init **init_tab_base) qat_uclo_create_batch_init_list() argument
742 qat_uclo_init_reg(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_addr, unsigned int value) qat_uclo_init_reg() argument
782 qat_uclo_init_reg_sym(struct icp_qat_fw_loader_handle *handle, unsigned int ae, struct icp_qat_uclo_encapme *encap_ae) qat_uclo_init_reg_sym() argument
1069 qat_uclo_wr_uimage_raw_page(struct icp_qat_fw_loader_handle *handle, struct icp_qat_uclo_encap_page *encap_page, unsigned int ae) qat_uclo_wr_uimage_raw_page() argument
H A Dicp_qat_hal.h108 #define AE_CSR(handle, ae) \
110 ((ae & handle->hal_handle->ae_mask) << 12))
111 #define AE_CSR_ADDR(handle, ae, csr) (AE_CSR(handle, ae) + (0x3ff & csr))
112 #define SET_AE_CSR(handle, ae, csr, val) \
113 ADF_CSR_WR(AE_CSR_ADDR(handle, ae, csr), 0, val)
114 #define GET_AE_CSR(handle, ae, csr) ADF_CSR_RD(AE_CSR_ADDR(handle, ae, csr), 0)
115 #define AE_XFER(handle, ae) \
117 ((ae & handle->hal_handle->ae_mask) << 12))
118 #define AE_XFER_ADDR(handle, ae, reg) (AE_XFER(handle, ae) + \
120 #define SET_AE_XFER(handle, ae, reg, val) \
121 ADF_CSR_WR(AE_XFER_ADDR(handle, ae, reg), 0, val)
H A Dadf_accel_engine.c118 uint32_t ae_ctr, ae, max_aes = GET_MAX_ACCELENGINES(accel_dev); adf_ae_start() local
123 for (ae = 0, ae_ctr = 0; ae < max_aes; ae++) { adf_ae_start()
124 if (hw_data->ae_mask & (1 << ae)) { adf_ae_start()
125 qat_hal_start(loader_data->fw_loader, ae, 0xFF); adf_ae_start()
139 uint32_t ae_ctr, ae, max_aes = GET_MAX_ACCELENGINES(accel_dev); adf_ae_stop() local
144 for (ae = 0, ae_ctr = 0; ae < max_aes; ae++) { adf_ae_stop()
145 if (hw_data->ae_mask & (1 << ae)) { adf_ae_stop()
146 qat_hal_stop(loader_data->fw_loader, ae, 0xFF); adf_ae_stop()
156 static int adf_ae_reset(struct adf_accel_dev *accel_dev, int ae) adf_ae_reset() argument
H A Dadf_common_drv.h173 void qat_hal_start(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
175 void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
180 unsigned char ae, unsigned int ctx_mask);
182 unsigned char ae, enum icp_qat_uof_regtype lm_type,
185 unsigned char ae, unsigned char mode);
187 unsigned char ae, unsigned char mode);
189 unsigned char ae, unsigned int ctx_mask, unsigned int upc);
191 unsigned char ae, unsigned int uaddr,
193 void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
198 unsigned char ae,
201 unsigned char ae, unsigned char ctx_mask,
205 unsigned char ae, unsigned char ctx_mask,
209 unsigned char ae, unsigned char ctx_mask,
213 unsigned char ae, unsigned char ctx_mask,
216 unsigned char ae, unsigned short lm_addr, unsigned int value);
H A Dadf_admin.c152 static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae, adf_put_admin_msg_sync() argument
156 int offset = ae * ADF_ADMINMSG_LEN * 2; adf_put_admin_msg_sync()
158 int mb_offset = ae * ADF_DH895XCC_MAILBOX_STRIDE; adf_put_admin_msg_sync()
H A Dicp_qat_uclo.h371 unsigned int ae; member in struct:icp_qat_uof_batch_init
/linux-4.4.14/drivers/scsi/lpfc/
H A Dlpfc_ct.c1415 struct lpfc_fdmi_attr_entry *ae; lpfc_fdmi_cmd() local
1507 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1508 memset(ae, 0, sizeof(struct lpfc_name)); lpfc_fdmi_cmd()
1512 memcpy(&ae->un.NodeName, &vport->fc_sparam.nodeName, lpfc_fdmi_cmd()
1523 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1524 memset(ae, 0, sizeof(ae->un.Manufacturer)); lpfc_fdmi_cmd()
1526 strncpy(ae->un.Manufacturer, "Emulex Corporation", lpfc_fdmi_cmd()
1527 sizeof(ae->un.Manufacturer)); lpfc_fdmi_cmd()
1528 len = strnlen(ae->un.Manufacturer, lpfc_fdmi_cmd()
1529 sizeof(ae->un.Manufacturer)); lpfc_fdmi_cmd()
1541 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1542 memset(ae, 0, sizeof(ae->un.SerialNumber)); lpfc_fdmi_cmd()
1544 strncpy(ae->un.SerialNumber, phba->SerialNumber, lpfc_fdmi_cmd()
1545 sizeof(ae->un.SerialNumber)); lpfc_fdmi_cmd()
1546 len = strnlen(ae->un.SerialNumber, lpfc_fdmi_cmd()
1547 sizeof(ae->un.SerialNumber)); lpfc_fdmi_cmd()
1559 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1560 memset(ae, 0, sizeof(ae->un.Model)); lpfc_fdmi_cmd()
1562 strncpy(ae->un.Model, phba->ModelName, lpfc_fdmi_cmd()
1563 sizeof(ae->un.Model)); lpfc_fdmi_cmd()
1564 len = strnlen(ae->un.Model, sizeof(ae->un.Model)); lpfc_fdmi_cmd()
1576 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1577 memset(ae, 0, sizeof(ae->un.ModelDescription)); lpfc_fdmi_cmd()
1579 strncpy(ae->un.ModelDescription, phba->ModelDesc, lpfc_fdmi_cmd()
1580 sizeof(ae->un.ModelDescription)); lpfc_fdmi_cmd()
1581 len = strnlen(ae->un.ModelDescription, lpfc_fdmi_cmd()
1582 sizeof(ae->un.ModelDescription)); lpfc_fdmi_cmd()
1593 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1594 memset(ae, 0, 8); lpfc_fdmi_cmd()
1602 ae->un.HardwareVersion[7 - i] = lpfc_fdmi_cmd()
1606 ae->un.HardwareVersion[7 - i] = lpfc_fdmi_cmd()
1620 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1621 memset(ae, 0, sizeof(ae->un.DriverVersion)); lpfc_fdmi_cmd()
1623 strncpy(ae->un.DriverVersion, lpfc_release_version, lpfc_fdmi_cmd()
1624 sizeof(ae->un.DriverVersion)); lpfc_fdmi_cmd()
1625 len = strnlen(ae->un.DriverVersion, lpfc_fdmi_cmd()
1626 sizeof(ae->un.DriverVersion)); lpfc_fdmi_cmd()
1638 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1639 memset(ae, 0, sizeof(ae->un.OptionROMVersion)); lpfc_fdmi_cmd()
1641 strncpy(ae->un.OptionROMVersion, phba->OptionROMVersion, lpfc_fdmi_cmd()
1642 sizeof(ae->un.OptionROMVersion)); lpfc_fdmi_cmd()
1643 len = strnlen(ae->un.OptionROMVersion, lpfc_fdmi_cmd()
1644 sizeof(ae->un.OptionROMVersion)); lpfc_fdmi_cmd()
1656 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1657 memset(ae, 0, sizeof(ae->un.FirmwareVersion)); lpfc_fdmi_cmd()
1659 lpfc_decode_firmware_rev(phba, ae->un.FirmwareVersion, lpfc_fdmi_cmd()
1661 len = strnlen(ae->un.FirmwareVersion, lpfc_fdmi_cmd()
1662 sizeof(ae->un.FirmwareVersion)); lpfc_fdmi_cmd()
1674 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1675 memset(ae, 0, sizeof(ae->un.OsNameVersion)); lpfc_fdmi_cmd()
1677 snprintf(ae->un.OsNameVersion, lpfc_fdmi_cmd()
1678 sizeof(ae->un.OsNameVersion), lpfc_fdmi_cmd()
1683 len = strnlen(ae->un.OsNameVersion, lpfc_fdmi_cmd()
1684 sizeof(ae->un.OsNameVersion)); lpfc_fdmi_cmd()
1695 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1699 ae->un.MaxCTPayloadLen = cpu_to_be32(LPFC_MAX_CT_SIZE); lpfc_fdmi_cmd()
1716 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1717 memset(ae, 0, sizeof(ae->un.NodeSymName)); lpfc_fdmi_cmd()
1720 ae->un.NodeSymName, sizeof(ae->un.NodeSymName)); lpfc_fdmi_cmd()
1759 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1760 memset(ae, 0, sizeof(ae->un.FC4Types)); lpfc_fdmi_cmd()
1764 ae->un.FC4Types[0] = 0x40; /* Type 1 - ELS */ lpfc_fdmi_cmd()
1765 ae->un.FC4Types[1] = 0x80; /* Type 8 - FCP */ lpfc_fdmi_cmd()
1766 ae->un.FC4Types[4] = 0x80; /* Type 32 - CT */ lpfc_fdmi_cmd()
1773 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1776 ae->un.SupportSpeed = 0; lpfc_fdmi_cmd()
1778 ae->un.SupportSpeed |= HBA_PORTSPEED_32GBIT; lpfc_fdmi_cmd()
1780 ae->un.SupportSpeed |= HBA_PORTSPEED_16GBIT; lpfc_fdmi_cmd()
1782 ae->un.SupportSpeed |= HBA_PORTSPEED_10GBIT; lpfc_fdmi_cmd()
1784 ae->un.SupportSpeed |= HBA_PORTSPEED_8GBIT; lpfc_fdmi_cmd()
1786 ae->un.SupportSpeed |= HBA_PORTSPEED_4GBIT; lpfc_fdmi_cmd()
1788 ae->un.SupportSpeed |= HBA_PORTSPEED_2GBIT; lpfc_fdmi_cmd()
1790 ae->un.SupportSpeed |= HBA_PORTSPEED_1GBIT; lpfc_fdmi_cmd()
1791 ae->un.SupportSpeed = lpfc_fdmi_cmd()
1792 cpu_to_be32(ae->un.SupportSpeed); lpfc_fdmi_cmd()
1800 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1805 ae->un.PortSpeed = HBA_PORTSPEED_1GBIT; lpfc_fdmi_cmd()
1808 ae->un.PortSpeed = HBA_PORTSPEED_2GBIT; lpfc_fdmi_cmd()
1811 ae->un.PortSpeed = HBA_PORTSPEED_4GBIT; lpfc_fdmi_cmd()
1814 ae->un.PortSpeed = HBA_PORTSPEED_8GBIT; lpfc_fdmi_cmd()
1817 ae->un.PortSpeed = HBA_PORTSPEED_10GBIT; lpfc_fdmi_cmd()
1820 ae->un.PortSpeed = HBA_PORTSPEED_16GBIT; lpfc_fdmi_cmd()
1823 ae->un.PortSpeed = HBA_PORTSPEED_32GBIT; lpfc_fdmi_cmd()
1826 ae->un.PortSpeed = HBA_PORTSPEED_UNKNOWN; lpfc_fdmi_cmd()
1829 ae->un.PortSpeed = cpu_to_be32(ae->un.PortSpeed); lpfc_fdmi_cmd()
1836 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1840 ae->un.MaxFrameSize = lpfc_fdmi_cmd()
1844 ae->un.MaxFrameSize = lpfc_fdmi_cmd()
1845 cpu_to_be32(ae->un.MaxFrameSize); lpfc_fdmi_cmd()
1855 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1856 memset(ae, 0, sizeof(ae->un.OsDeviceName)); lpfc_fdmi_cmd()
1858 strncpy((char *)ae->un.OsDeviceName, LPFC_DRIVER_NAME, lpfc_fdmi_cmd()
1859 sizeof(ae->un.OsDeviceName)); lpfc_fdmi_cmd()
1860 len = strnlen((char *)ae->un.OsDeviceName, lpfc_fdmi_cmd()
1861 sizeof(ae->un.OsDeviceName)); lpfc_fdmi_cmd()
1873 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1874 memset(ae, 0, sizeof(ae->un.HostName)); lpfc_fdmi_cmd()
1875 snprintf(ae->un.HostName, sizeof(ae->un.HostName), "%s", lpfc_fdmi_cmd()
1878 len = strnlen(ae->un.HostName, lpfc_fdmi_cmd()
1879 sizeof(ae->un.HostName)); lpfc_fdmi_cmd()
1899 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1900 memset(ae, 0, sizeof(struct lpfc_name)); lpfc_fdmi_cmd()
1904 memcpy(&ae->un.NodeName, &vport->fc_sparam.nodeName, lpfc_fdmi_cmd()
1915 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1916 memset(ae, 0, sizeof(struct lpfc_name)); lpfc_fdmi_cmd()
1920 memcpy(&ae->un.PortName, &vport->fc_sparam.portName, lpfc_fdmi_cmd()
1931 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1932 memset(ae, 0, sizeof(ae->un.NodeSymName)); lpfc_fdmi_cmd()
1935 ae->un.NodeSymName, sizeof(ae->un.NodeSymName)); lpfc_fdmi_cmd()
1946 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1948 ae->un.PortState = 0; lpfc_fdmi_cmd()
1958 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1960 ae->un.SupportClass = lpfc_fdmi_cmd()
1972 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1973 memset(ae, 0, sizeof(struct lpfc_name)); lpfc_fdmi_cmd()
1977 memcpy(&ae->un.FabricName, &vport->fabric_nodename, lpfc_fdmi_cmd()
1988 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
1989 memset(ae, 0, sizeof(ae->un.FC4Types)); lpfc_fdmi_cmd()
1993 ae->un.FC4Types[0] = 0x40; /* Type 1 - ELS */ lpfc_fdmi_cmd()
1994 ae->un.FC4Types[1] = 0x80; /* Type 8 - FCP */ lpfc_fdmi_cmd()
1995 ae->un.FC4Types[4] = 0x80; /* Type 32 - CT */ lpfc_fdmi_cmd()
2004 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
2006 ae->un.PortState = 0; lpfc_fdmi_cmd()
2016 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
2018 ae->un.PortState = lpfc_find_map_node(vport); lpfc_fdmi_cmd()
2019 ae->un.PortState = cpu_to_be32(ae->un.PortState); lpfc_fdmi_cmd()
2029 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; lpfc_fdmi_cmd()
2031 ae->un.PortId = cpu_to_be32(vport->fc_myDID); lpfc_fdmi_cmd()
/linux-4.4.14/drivers/scsi/esas2r/
H A Desas2r_int.c702 static void esas2r_lun_event(struct esas2r_adapter *a, union atto_vda_ae *ae, esas2r_lun_event() argument
712 esas2r_trace("ae->lu.dwevent: %x", ae->lu.dwevent); esas2r_lun_event()
713 esas2r_trace("ae->lu.bystate: %x", ae->lu.bystate); esas2r_lun_event()
719 if (ae->lu.dwevent & VDAAE_LU_LOST) { esas2r_lun_event()
722 switch (ae->lu.bystate) { esas2r_lun_event()
738 memcpy(&t->lu_event, &ae->lu, cplen); esas2r_lun_event()
750 union atto_vda_ae *ae = esas2r_ae_complete() local
770 last = ae; esas2r_ae_complete()
773 while (ae < last) { esas2r_ae_complete()
776 esas2r_trace("ae: %p", ae); esas2r_ae_complete()
777 esas2r_trace("ae->hdr: %p", &(ae->hdr)); esas2r_ae_complete()
779 length = ae->hdr.bylength; esas2r_ae_complete()
781 if (length > (u32)((u8 *)last - (u8 *)ae) esas2r_ae_complete()
786 ae, length); esas2r_ae_complete()
788 esas2r_hdebug("ae->hdr.length (0x%x) invalid", length); esas2r_ae_complete()
794 esas2r_nuxi_ae_data(ae); esas2r_ae_complete()
796 esas2r_queue_fw_event(a, fw_event_vda_ae, ae, esas2r_ae_complete()
799 switch (ae->hdr.bytype) { esas2r_ae_complete()
802 if (ae->raid.dwflags & (VDAAE_GROUP_STATE esas2r_ae_complete()
808 ae->raid.acname, esas2r_ae_complete()
809 ae->raid.byrebuild_state, esas2r_ae_complete()
810 ae->raid.bygroup_state); esas2r_ae_complete()
818 ae->lu.dwevent, esas2r_ae_complete()
819 ae->lu.id.tgtlun.wtarget_id, esas2r_ae_complete()
820 ae->lu.id.tgtlun.bylun, esas2r_ae_complete()
821 ae->lu.bystate); esas2r_ae_complete()
823 target = ae->lu.id.tgtlun.wtarget_id; esas2r_ae_complete()
826 esas2r_lun_event(a, ae, target, length); esas2r_ae_complete()
843 ae = (union atto_vda_ae *)((u8 *)ae + length); esas2r_ae_complete()
854 struct atto_vda_ae_hdr ae; esas2r_send_reset_ae() local
857 ae.bytype = VDAAE_HDR_TYPE_PWRMGT; esas2r_send_reset_ae()
859 ae.bytype = VDAAE_HDR_TYPE_RESET; esas2r_send_reset_ae()
861 ae.byversion = VDAAE_HDR_VER_0; esas2r_send_reset_ae()
862 ae.byflags = 0; esas2r_send_reset_ae()
863 ae.bylength = (u8)sizeof(struct atto_vda_ae_hdr); esas2r_send_reset_ae()
870 esas2r_queue_fw_event(a, fw_event_vda_ae, &ae, esas2r_send_reset_ae()
H A Desas2r_main.c1511 void esas2r_nuxi_ae_data(union atto_vda_ae *ae) esas2r_nuxi_ae_data() argument
1513 struct atto_vda_ae_raid *r = &ae->raid; esas2r_nuxi_ae_data()
1514 struct atto_vda_ae_lu *l = &ae->lu; esas2r_nuxi_ae_data()
1516 switch (ae->hdr.bytype) { esas2r_nuxi_ae_data()
1771 struct esas2r_vda_ae *ae = (struct esas2r_vda_ae *)fw_event->data; esas2r_send_ae_event() local
1774 switch (ae->vda_ae.hdr.bytype) { esas2r_send_ae_event()
1843 esas2r_log_hexdump(ESAS2R_LOG_WARN, &ae->vda_ae, esas2r_send_ae_event()
1844 ae->vda_ae.hdr.bylength); esas2r_send_ae_event()
1903 struct esas2r_vda_ae *ae = esas2r_queue_fw_event() local
1906 ae->signature = ESAS2R_VDA_EVENT_SIG; esas2r_queue_fw_event()
1907 ae->bus_number = a->pcid->bus->number; esas2r_queue_fw_event()
1908 ae->devfn = a->pcid->devfn; esas2r_queue_fw_event()
1909 memcpy(&ae->vda_ae, data, sizeof(ae->vda_ae)); esas2r_queue_fw_event()
H A Desas2r_vda.c422 struct atto_vda_ae_req *vrq = &rq->vrq->ae; esas2r_build_ae_req()
H A Datvda.h1221 struct atto_vda_ae_req ae; member in union:atto_vda_req
H A Desas2r.h1099 void esas2r_nuxi_ae_data(union atto_vda_ae *ae);
/linux-4.4.14/drivers/staging/rdma/amso1100/
H A Dc2_ae.c172 resource_indicator = be32_to_cpu(wr->ae.ae_generic.resource_type); c2_ae_event()
174 (void *) (unsigned long) wr->ae.ae_generic.user_context; c2_ae_event()
200 (unsigned long long) wr->ae.ae_generic.user_context, c2_ae_event()
201 be32_to_cpu(wr->ae.ae_generic.resource_type), c2_ae_event()
202 be32_to_cpu(wr->ae.ae_generic.resource), c2_ae_event()
203 to_qp_state_str(be32_to_cpu(wr->ae.ae_generic.qp_state))); c2_ae_event()
205 c2_set_qp_state(qp, be32_to_cpu(wr->ae.ae_generic.qp_state)); c2_ae_event()
209 res = &wr->ae.ae_active_connect_results; c2_ae_event()
274 &wr->ae.ae_connection_request; c2_ae_event()
H A Dc2_wr.h1458 union c2wr_ae ae; member in union:c2wr
/linux-4.4.14/security/selinux/
H A Davc.c56 struct avc_entry ae; member in struct:avc_node
386 node->ae.xp_node->xp.len++; avc_add_xperms_decision()
391 list_add(&dest_xpd->xpd_list, &node->ae.xp_node->xpd_head); avc_add_xperms_decision()
431 node->ae.xp_node = dest; avc_xperms_populate()
488 avc_xperms_free(node->ae.xp_node); avc_node_free()
502 avc_xperms_free(node->ae.xp_node); avc_node_kill()
569 node->ae.ssid = ssid; avc_node_populate()
570 node->ae.tsid = tsid; avc_node_populate()
571 node->ae.tclass = tclass; avc_node_populate()
572 memcpy(&node->ae.avd, avd, sizeof(node->ae.avd)); avc_node_populate()
584 if (ssid == node->ae.ssid && hlist_for_each_entry_rcu()
585 tclass == node->ae.tclass && hlist_for_each_entry_rcu()
586 tsid == node->ae.tsid) { hlist_for_each_entry_rcu()
690 if (pos->ae.ssid == ssid && hlist_for_each_entry()
691 pos->ae.tsid == tsid && hlist_for_each_entry()
692 pos->ae.tclass == tclass) { hlist_for_each_entry()
846 if (ssid == pos->ae.ssid && hlist_for_each_entry()
847 tsid == pos->ae.tsid && hlist_for_each_entry()
848 tclass == pos->ae.tclass && hlist_for_each_entry()
849 seqno == pos->ae.avd.seqno){ hlist_for_each_entry()
865 avc_node_populate(node, ssid, tsid, tclass, &orig->ae.avd);
867 if (orig->ae.xp_node) {
868 rc = avc_xperms_populate(node, orig->ae.xp_node);
877 node->ae.avd.allowed |= perms;
878 if (node->ae.xp_node && (flags & AVC_EXTENDED_PERMS))
879 avc_xperms_allow_perm(node->ae.xp_node, driver, xperm);
883 node->ae.avd.allowed &= ~perms;
886 node->ae.avd.auditallow |= perms;
889 node->ae.avd.auditallow &= ~perms;
892 node->ae.avd.auditdeny |= perms;
895 node->ae.avd.auditdeny &= ~perms;
1028 memcpy(&avd, &node->ae.avd, sizeof(avd)); avc_has_extended_perms()
1029 xp_node = node->ae.xp_node; avc_has_extended_perms()
1116 memcpy(avd, &node->ae.avd, sizeof(*avd)); avc_has_perm_noaudit()
/linux-4.4.14/arch/powerpc/perf/
H A Dpower7-pmu.c163 s64 ae; power7_get_alternatives() local
170 ae = event_alternatives[i][j]; power7_get_alternatives()
171 if (ae && ae != event) power7_get_alternatives()
172 alt[nalt++] = ae; power7_get_alternatives()
175 ae = find_alternative_decode(event); power7_get_alternatives()
176 if (ae > 0) power7_get_alternatives()
177 alt[nalt++] = ae; power7_get_alternatives()
H A Dpower5+-pmu.c280 s64 ae; power5p_get_alternatives() local
288 ae = event_alternatives[i][j]; power5p_get_alternatives()
289 if (ae && ae != event) power5p_get_alternatives()
290 alt[nalt++] = ae; power5p_get_alternatives()
291 nlim += power5p_limited_pmc_event(ae); power5p_get_alternatives()
294 ae = find_alternative_bdecode(event); power5p_get_alternatives()
295 if (ae > 0) power5p_get_alternatives()
296 alt[nalt++] = ae; power5p_get_alternatives()
H A Dmpc7450-pmu.c229 u32 ae; mpc7450_get_alternatives() local
236 ae = event_alternatives[i][j]; mpc7450_get_alternatives()
237 if (ae && ae != (u32)event) mpc7450_get_alternatives()
238 alt[nalt++] = ae; mpc7450_get_alternatives()
H A Dpower5-pmu.c275 s64 ae; power5_get_alternatives() local
282 ae = event_alternatives[i][j]; power5_get_alternatives()
283 if (ae && ae != event) power5_get_alternatives()
284 alt[nalt++] = ae; power5_get_alternatives()
287 ae = find_alternative_bdecode(event); power5_get_alternatives()
288 if (ae > 0) power5_get_alternatives()
289 alt[nalt++] = ae; power5_get_alternatives()
/linux-4.4.14/arch/ia64/kernel/
H A Defi.c975 u64 as = 0, ae; find_memmap_space() local
1018 ae = min(contig_high, efi_md_end(md)); find_memmap_space()
1022 ae = min(ae, max_addr); find_memmap_space()
1023 if (ae <= as) find_memmap_space()
1027 if (total_mem + (ae - as) > mem_limit) find_memmap_space()
1028 ae -= total_mem + (ae - as) - mem_limit; find_memmap_space()
1030 if (ae <= as) find_memmap_space()
1033 if (ae - as > space_needed) find_memmap_space()
1052 u64 as, ae, lim; efi_memmap_init() local
1135 ae = contig_high; efi_memmap_init()
1137 ae = efi_md_end(md); efi_memmap_init()
1141 ae = min(ae, max_addr); efi_memmap_init()
1142 if (ae <= as) efi_memmap_init()
1146 if (total_mem + (ae - as) > mem_limit) efi_memmap_init()
1147 ae -= total_mem + (ae - as) - mem_limit; efi_memmap_init()
1149 if (ae <= as) efi_memmap_init()
1152 prev->num_pages += (ae - as) >> EFI_PAGE_SHIFT; efi_memmap_init()
1153 total_mem += ae - as; efi_memmap_init()
1158 k->num_pages = (ae - as) >> EFI_PAGE_SHIFT; efi_memmap_init()
1159 total_mem += ae - as; efi_memmap_init()
/linux-4.4.14/drivers/misc/mic/host/
H A Dmic_smpt.c103 int ae = 0; mic_smpt_op() local
115 ae++; mic_smpt_op()
117 } else if (ae) /* cannot find contiguous entries */ mic_smpt_op()
120 if (ae == entries) mic_smpt_op()
125 for (ae = 0, i = 0; i < smpt_info->info.num_reg; i++) { mic_smpt_op()
126 ae = (smpt_info->entry[i].ref_count == 0) ? ae + 1 : 0; mic_smpt_op()
127 if (ae == entries) mic_smpt_op()
/linux-4.4.14/arch/powerpc/crypto/
H A Daes-tab-4k.S55 .long R(3d, 93, 93, ae), R(4c, 26, 26, 6a)
133 .long R(47, ae, ae, e9), R(10, 08, 08, 18)
147 .long R(ae, 57, 57, f9), R(69, b9, b9, d0)
191 .long R(b1, 64, 77, e0), R(bb, 6b, ae, 84)
210 .long R(dd, 3e, 05, ae), R(4d, e6, bd, 46)
222 .long R(3d, ae, d5, 1e), R(36, 2d, 39, 27)
242 .long R(ae, f9, 32, 11), R(c7, 29, a1, 6d)
/linux-4.4.14/tools/perf/tests/
H A Dkmod-path.c46 #define T(path, an, ae, k, c, n, e) \
47 TEST_ASSERT_VAL("failed", !test(path, an, ae, k, c, n, e))
/linux-4.4.14/drivers/net/ethernet/hisilicon/hns/
H A Dhnae.c269 * ae_chain - define ae chain head
312 * @ae_id: the id of the ae to be used
386 * @hdev: the hnae ae engine device
H A Dhnae.h14 * ae handle (handle):
H A Dhns_enet.c750 *@h: ae handle
1532 ret = of_property_read_string(node, "ae-name", &priv->ae_name); hns_nic_dev_probe()
/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/
H A Dpci.h113 #define RTL_PCI_8821AE_DID 0x8821 /*8821ae*/
114 #define RTL_PCI_8812AE_DID 0x8812 /*8812ae*/
/linux-4.4.14/drivers/power/
H A Dbq27xxx_battery.c560 int ae; bq27xxx_battery_read_energy() local
562 ae = bq27xxx_read(di, BQ27XXX_REG_AE, false); bq27xxx_battery_read_energy()
563 if (ae < 0) { bq27xxx_battery_read_energy()
565 return ae; bq27xxx_battery_read_energy()
569 ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS; bq27xxx_battery_read_energy()
571 ae *= 1000; bq27xxx_battery_read_energy()
573 return ae; bq27xxx_battery_read_energy()
/linux-4.4.14/drivers/net/wireless/brcm80211/brcmsmac/
H A Ddma.c728 u32 ae; dma64_dd_upd() local
730 ae = (pa & PCI32ADDR_HIGH) >> PCI32ADDR_HIGH_SHIFT; dma64_dd_upd()
733 ctrl2 |= (ae << D64_CTRL2_AE_SHIFT) & D64_CTRL2_AE; dma64_dd_upd()
798 u32 ae; _dma_ddtable_init() local
800 /* shift the high bit(s) from pa to ae */ _dma_ddtable_init()
801 ae = (pa & PCI32ADDR_HIGH) >> PCI32ADDR_HIGH_SHIFT; _dma_ddtable_init()
810 D64_XC_AE, (ae << D64_XC_AE_SHIFT)); _dma_ddtable_init()
817 D64_RC_AE, (ae << D64_RC_AE_SHIFT)); _dma_ddtable_init()
/linux-4.4.14/lib/
H A Dbch.c653 /* first, eliminate cX by using z=X+e with ae^2+c=0 */ find_poly_deg4_roots()
663 * z^4 + az^3 + (ae+b)z^2 + (ae^2+c)z+e^4+be^2+ae^3+ce+d find_poly_deg4_roots()
664 * z^4 + az^3 + (ae+b)z^2 + e^4+be^2+d find_poly_deg4_roots()
H A Dglob.c241 "1" "*ac*ae*ag*\0" "abacadaeafag\0"
/linux-4.4.14/net/mac80211/
H A Dmesh_hwmp.c24 static inline u32 u32_field_get(const u8 *preq_elem, int offset, bool ae) u32_field_get() argument
26 if (ae) u32_field_get()
31 static inline u16 u16_field_get(const u8 *preq_elem, int offset, bool ae) u16_field_get() argument
33 if (ae) u16_field_get()
H A Dmesh.c602 * @addr4or5: 1st address in the ae header, which may correspond to address 4
605 * @addr6: 2nd address in the ae header, which corresponds to addr6 of the
/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dsw.c433 MODULE_DESCRIPTION("Realtek 8821ae 802.11ac PCI wireless");
H A Ddm.c2524 "Trigger 8821ae Thermal Meter!!\n"); rtl8821ae_dm_check_txpower_tracking_thermalmeter()
H A Dhw.c3850 "rtl8821ae_update_hal_rate_tbl() Error! 8821ae FW RA Only");*/ rtl8821ae_update_hal_rate_tbl()
/linux-4.4.14/drivers/crypto/qat/qat_dh895xcc/
H A Dadf_isr.c200 "qat%d-ae-cluster", accel_dev->accel_id); adf_request_irqs()
/linux-4.4.14/arch/powerpc/include/asm/
H A Dsfp-machine.h233 __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
/linux-4.4.14/scripts/
H A Dget_maintainer.pl105 'GitAuthor: %an <%ae>%n' .
114 'GitAuthor: %an <%ae>%n' .
123 'GitAuthor: %an <%ae>%n' .
/linux-4.4.14/drivers/scsi/csiostor/
H A Dcsio_lnode.c243 struct fc_fdmi_attr_entry *ae = (struct fc_fdmi_attr_entry *)*ptr; csio_append_attrib() local
244 ae->type = htons(type); csio_append_attrib()
247 ae->len = htons(len); csio_append_attrib()
248 memcpy(ae->value, val, len); csio_append_attrib()
/linux-4.4.14/drivers/scsi/ibmvscsi/
H A Dibmvfc.h547 enum ibmvfc_async_event ae; member in struct:ibmvfc_async_desc
H A Dibmvfc.c2586 * @ae: async event
2589 static const struct ibmvfc_async_desc *ibmvfc_get_ae_desc(u64 ae) ibmvfc_get_ae_desc() argument
2594 if (ae_desc[i].ae == ae) ibmvfc_get_ae_desc()
/linux-4.4.14/lib/mpi/
H A Dlonglong.h756 __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
894 "ae %0,%3" \
/linux-4.4.14/net/wireless/
H A Dutil.c398 int ae = meshhdr->flags & MESH_FLAGS_AE; ieee80211_get_mesh_hdrlen() local
400 switch (ae) { ieee80211_get_mesh_hdrlen()
/linux-4.4.14/drivers/infiniband/hw/nes/
H A Dnes_verbs.c3155 " need ae to finish up, original_last_aeq = 0x%04X." nes_modify_qp()
3165 " need ae to finish up, original_last_aeq = 0x%04X." nes_modify_qp()
3172 nes_debug(NES_DBG_MOD_QP, "QP%u Decrementing QP refcount (%d), No ae to finish up," nes_modify_qp()
3178 nes_debug(NES_DBG_MOD_QP, "QP%u Decrementing QP refcount (%d), No ae to finish up," nes_modify_qp()
H A Dnes_hw.c3608 " need ae to finish up, original_last_aeq = 0x%04X." nes_process_iwarp_aeqe()
/linux-4.4.14/drivers/media/dvb-core/
H A Ddemux.h205 * on ae TS feed has been enabled using the start_filtering() function at
/linux-4.4.14/arch/x86/kernel/
H A Duprobes.c207 * 0f ae - group15: [f]xsave,[f]xrstor,[v]{ld,st}mxcsr,clflush[opt],
/linux-4.4.14/include/linux/
H A Dphy.h146 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
/linux-4.4.14/drivers/staging/speakup/
H A Dmain.c186 /*230*/ "ae", "c cidella", "e grave", "e acute",
/linux-4.4.14/drivers/scsi/
H A Dconstants.c93 /* aa-ae */ "Write(12)", NULL, "Erase(12), Get Performance",
/linux-4.4.14/arch/s390/kernel/
H A Ddis.c639 { "ae", 0x7a, INSTR_RX_FRRD },
/linux-4.4.14/arch/powerpc/xmon/
H A Dppc-opc.c3543 { "ae", XO(31,138,0,0), XO_MASK, PWRCOM, { RT, RA, RB } },
3545 { "ae.", XO(31,138,0,1), XO_MASK, PWRCOM, { RT, RA, RB } },
/linux-4.4.14/drivers/media/usb/gspca/
H A Dzc3xx.c5036 {0xa0, 0xae, ZC3XX_R191_EXPOSURELIMITMID}, /* 01,91,ae,cc */

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