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Searched refs:acr (Results 1 – 40 of 40) sorted by relevance

/linux-4.4.14/arch/cris/arch-v32/kernel/
Dkgdb_asm.S21 move.d $acr, [$sp]
319 move.d sreg, $acr
326 move.d [$acr], $r0
328 addq 4, $acr
329 move.d [$acr], $r0
331 addq 4, $acr
332 move.d [$acr], $r0
334 addq 4, $acr
335 move.d [$acr], $r0
337 addq 4, $acr
[all …]
Dentry.S51 addoq +TI_preempt_count, $r0, $acr
52 move.d [$acr], $r10 ; Preemption disabled?
57 addoq +TI_flags, $r0, $acr
58 move.d [$acr], $r10
108 addoq +PT_ccs, $sp, $acr
109 move.d [$acr], $r0
234 addoq +TI_flags, $r0, $acr
235 move.d [$acr], $r1
244 addoq +PT_ccs, $sp, $acr
245 move.d [$acr], $r0
[all …]
Dtraps.c39 regs->r12, regs->r13, regs->orig_r10, regs->acr); in show_registers()
Dhead.S224 addoq +4, $r4, $acr
225 move.d [$acr], $r0
Dkgdb.c210 unsigned int acr; /* 0x3C; R15, Address calculation register. */ member
/linux-4.4.14/arch/cris/arch-v32/mm/
Dmmu.S30 move.d $acr, [$sp]
96 move.d $acr, [$sp]
98 move.d 1b, $acr ; Point to refill_count
101 test.d [$acr] ; refill_count == 0 ?
103 move.d $acr, $r1
114 move.d $r2, [$acr] ; refill_count = 1
118 move.d current_pgd, $acr ; PGD
121 move.d [$acr], $acr ; PGD for the current process
122 addi $r0.d, $acr, $acr
124 move.d [$acr], $acr ; Get PMD
[all …]
/linux-4.4.14/arch/cris/arch-v32/lib/
Dchecksum.S19 move.d $r11, $acr
29 addoq -10*4, $acr, $acr
43 ;; test $acr without trashing carry.
44 move.d $acr, $acr
46 ;; r11 <= acr is not really needed in the mloop, just using the dslot
48 move.d $acr, $r11
Dchecksumcopy.S23 move.d $r12, $acr
32 addoq -10*4, $acr, $acr ; loop counter in latency cycle
47 ;; test $acr, without trashing carry.
48 move.d $acr, $acr
50 ;; r12 <= acr is needed after mloop and in the exception handlers.
51 move.d $acr, $r12
Dcsumcpfruser.S46 move.d [$sp],$acr
49 move.d $r9,[$acr]
/linux-4.4.14/arch/arm/mach-omap2/
Domap-secure.c126 u32 acr; in rx51_secure_update_aux_cr() local
129 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); in rx51_secure_update_aux_cr()
130 acr &= ~clear_bits; in rx51_secure_update_aux_cr()
131 acr |= set_bits; in rx51_secure_update_aux_cr()
136 1, acr, 0, 0, 0); in rx51_secure_update_aux_cr()
/linux-4.4.14/drivers/gpu/drm/radeon/
Ddce3_1_afmt.c171 const struct radeon_hdmi_acr *acr) in dce3_2_hdmi_update_acr() argument
181 HDMI0_ACR_CTS_32(acr->cts_32khz), in dce3_2_hdmi_update_acr()
184 HDMI0_ACR_N_32(acr->n_32khz), in dce3_2_hdmi_update_acr()
188 HDMI0_ACR_CTS_44(acr->cts_44_1khz), in dce3_2_hdmi_update_acr()
191 HDMI0_ACR_N_44(acr->n_44_1khz), in dce3_2_hdmi_update_acr()
195 HDMI0_ACR_CTS_48(acr->cts_48khz), in dce3_2_hdmi_update_acr()
198 HDMI0_ACR_N_48(acr->n_48khz), in dce3_2_hdmi_update_acr()
Devergreen_hdmi.c68 const struct radeon_hdmi_acr *acr) in evergreen_hdmi_update_acr() argument
87 WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz)); in evergreen_hdmi_update_acr()
88 WREG32(HDMI_ACR_32_1 + offset, acr->n_32khz); in evergreen_hdmi_update_acr()
90 WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz)); in evergreen_hdmi_update_acr()
91 WREG32(HDMI_ACR_44_1 + offset, acr->n_44_1khz); in evergreen_hdmi_update_acr()
93 WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr->cts_48khz)); in evergreen_hdmi_update_acr()
94 WREG32(HDMI_ACR_48_1 + offset, acr->n_48khz); in evergreen_hdmi_update_acr()
Dr600_hdmi.c178 const struct radeon_hdmi_acr *acr) in r600_hdmi_update_acr() argument
193 HDMI0_ACR_CTS_32(acr->cts_32khz), in r600_hdmi_update_acr()
196 HDMI0_ACR_N_32(acr->n_32khz), in r600_hdmi_update_acr()
200 HDMI0_ACR_CTS_44(acr->cts_44_1khz), in r600_hdmi_update_acr()
203 HDMI0_ACR_N_44(acr->n_44_1khz), in r600_hdmi_update_acr()
207 HDMI0_ACR_CTS_48(acr->cts_48khz), in r600_hdmi_update_acr()
210 HDMI0_ACR_N_48(acr->n_48khz), in r600_hdmi_update_acr()
Dradeon_audio.c83 const struct radeon_hdmi_acr *acr);
85 const struct radeon_hdmi_acr *acr);
87 const struct radeon_hdmi_acr *acr);
628 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock); in radeon_audio_update_acr() local
636 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr); in radeon_audio_update_acr()
Dradeon_audio.h57 const struct radeon_hdmi_acr *acr);
/linux-4.4.14/sound/soc/sh/
Ddma-sh7760.c223 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); in dmabrg_play_dma_start() local
225 BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD; in dmabrg_play_dma_start()
230 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); in dmabrg_play_dma_stop() local
232 BRGREG(BRGACR) = acr | ACR_TDS; in dmabrg_play_dma_stop()
237 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); in dmabrg_rec_dma_start() local
239 BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD; in dmabrg_rec_dma_start()
244 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); in dmabrg_rec_dma_stop() local
246 BRGREG(BRGACR) = acr | ACR_RDS; in dmabrg_rec_dma_stop()
/linux-4.4.14/sound/aoa/codecs/
Dtas.c94 u8 acr; member
492 ucontrol->value.enumerated.item[0] = !!(tas->acr & TAS_ACR_INPUT_B); in tas_snd_capture_source_get()
506 oldacr = tas->acr; in tas_snd_capture_source_put()
513 tas->acr &= ~(TAS_ACR_INPUT_B | TAS_ACR_B_MONAUREAL); in tas_snd_capture_source_put()
515 tas->acr |= TAS_ACR_INPUT_B | TAS_ACR_B_MONAUREAL | in tas_snd_capture_source_put()
517 if (oldacr == tas->acr) { in tas_snd_capture_source_put()
522 tas_write_reg(tas, TAS_REG_ACR, 1, &tas->acr); in tas_snd_capture_source_put()
690 tas->acr |= TAS_ACR_ANALOG_PDOWN; in tas_reset_init()
691 if (tas_write_reg(tas, TAS_REG_ACR, 1, &tas->acr)) in tas_reset_init()
706 tas->acr &= ~TAS_ACR_ANALOG_PDOWN; in tas_reset_init()
[all …]
/linux-4.4.14/arch/avr32/lib/
Dcsum_partial.S23 acr r10
44 acr r10
Dcsum_partial_copy_generic.S46 acr r9
70 acr r9
/linux-4.4.14/arch/cris/include/uapi/asm/
Delf_v32.h27 (_r)->acr = 0; \
58 pr_reg[15] = regs->acr; /* ACR */ \
Dptrace_v32.h73 unsigned long acr; member
/linux-4.4.14/arch/powerpc/include/asm/
Dmpc52xx_psc.h177 u8 acr; member
180 #define mpc52xx_psc_acr ipcr_acr.acr
324 u8 acr; /* PSC + 0x1c */ member
/linux-4.4.14/arch/cris/include/uapi/arch-v32/arch/
Duser.h22 unsigned long acr; /* R15, Address calculation register. */ member
/linux-4.4.14/drivers/power/
Dds2760_battery.c236 unsigned char acr[2]; in ds2760_battery_set_current_accum() local
242 acr[0] = acr_val >> 8; in ds2760_battery_set_current_accum()
243 acr[1] = acr_val & 0xff; in ds2760_battery_set_current_accum()
245 if (w1_ds2760_write(di->w1_dev, acr, DS2760_CURRENT_ACCUM_MSB, 2) < 2) in ds2760_battery_set_current_accum()
/linux-4.4.14/drivers/tty/serial/
Dsunsu.c89 unsigned char acr; member
179 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
182 serial_icr_write(up, UART_ACR, up->acr);
276 up->acr |= UART_ACR_TXDIS; in sunsu_stop_tx()
277 serial_icr_write(up, UART_ACR, up->acr); in sunsu_stop_tx()
294 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) { in sunsu_start_tx()
295 up->acr &= ~UART_ACR_TXDIS; in sunsu_start_tx()
296 serial_icr_write(up, UART_ACR, up->acr); in sunsu_start_tx()
627 up->acr = 0; in sunsu_startup()
Dsccnxp.c249 u8 acr; member
289 u8 i, acr = 0, csr = 0, mr0 = 0; in sccnxp_set_baud() local
298 acr = baud_std[i].acr; in sccnxp_set_baud()
313 sccnxp_port_write(port, SCCNXP_ACR_REG, acr | ACR_TIMER_MODE); in sccnxp_set_baud()
Dm32r_sio.c112 unsigned char acr; member
/linux-4.4.14/arch/cris/kernel/
Dasm-offsets.c25 ENTRY(acr); in main()
/linux-4.4.14/include/linux/
Dserial_8250.h94 unsigned char acr; member
/linux-4.4.14/arch/arm/kernel/
Dhead-nommu.S176 .macro setup_region bar, acr, sr, side = MPU_DATA_SIDE
178 mcr p15, 0, \acr, c6, c1, (4 + \side) @ I/DRACR
/linux-4.4.14/drivers/ipack/devices/
Dscc2698.h73 u8 d4, acr; /* Auxiliary control register of block */ member
Dipoctal.c341 iowrite8(ACR_BRG_SET2, &block_regs[i].w.acr); in ipoctal_inst_slot()
/linux-4.4.14/drivers/tty/serial/8250/
D8250_port.c486 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD); in serial_icr_read()
489 serial_icr_write(up, UART_ACR, up->acr); in serial_icr_read()
767 up->acr = 0; in autoconfig_has_efr()
1303 up->acr |= UART_ACR_TXDIS; in serial8250_stop_tx()
1304 serial_icr_write(up, UART_ACR, up->acr); in serial8250_stop_tx()
1334 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) { in serial8250_start_tx()
1335 up->acr &= ~UART_ACR_TXDIS; in serial8250_start_tx()
1336 serial_icr_write(up, UART_ACR, up->acr); in serial8250_start_tx()
1824 up->acr = 0; in serial8250_do_startup()
/linux-4.4.14/arch/arm/mm/
Dcache-l2x0.c631 u32 acr = get_auxcr(); in l2c310_enable() local
633 pr_debug("Cortex-A9 ACR=0x%08x\n", acr); in l2c310_enable()
635 if (acr & BIT(3) && !(aux_cur & L310_AUX_CTRL_FULL_LINE_ZERO)) in l2c310_enable()
638 if (aux & L310_AUX_CTRL_FULL_LINE_ZERO && !(acr & BIT(3))) in l2c310_enable()
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Ddce_v8_0.c1658 struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock); in dce_v8_0_afmt_update_ACR() local
1663 WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz << HDMI_ACR_44_0__HDMI_ACR_CTS_44__SHIFT)); in dce_v8_0_afmt_update_ACR()
1664 WREG32(mmHDMI_ACR_32_1 + offset, acr.n_32khz); in dce_v8_0_afmt_update_ACR()
1666 WREG32(mmHDMI_ACR_44_0 + offset, (acr.cts_44_1khz << HDMI_ACR_44_0__HDMI_ACR_CTS_44__SHIFT)); in dce_v8_0_afmt_update_ACR()
1667 WREG32(mmHDMI_ACR_44_1 + offset, acr.n_44_1khz); in dce_v8_0_afmt_update_ACR()
1669 WREG32(mmHDMI_ACR_48_0 + offset, (acr.cts_48khz << HDMI_ACR_48_0__HDMI_ACR_CTS_48__SHIFT)); in dce_v8_0_afmt_update_ACR()
1670 WREG32(mmHDMI_ACR_48_1 + offset, acr.n_48khz); in dce_v8_0_afmt_update_ACR()
Ddce_v11_0.c1675 struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock); in dce_v11_0_afmt_update_ACR() local
1681 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz); in dce_v11_0_afmt_update_ACR()
1684 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_1, HDMI_ACR_N_32, acr.n_32khz); in dce_v11_0_afmt_update_ACR()
1688 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_0, HDMI_ACR_CTS_44, acr.cts_44_1khz); in dce_v11_0_afmt_update_ACR()
1691 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz); in dce_v11_0_afmt_update_ACR()
1695 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_0, HDMI_ACR_CTS_48, acr.cts_48khz); in dce_v11_0_afmt_update_ACR()
1698 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_1, HDMI_ACR_N_48, acr.n_48khz); in dce_v11_0_afmt_update_ACR()
Ddce_v10_0.c1687 struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock); in dce_v10_0_afmt_update_ACR() local
1693 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz); in dce_v10_0_afmt_update_ACR()
1696 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_1, HDMI_ACR_N_32, acr.n_32khz); in dce_v10_0_afmt_update_ACR()
1700 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_0, HDMI_ACR_CTS_44, acr.cts_44_1khz); in dce_v10_0_afmt_update_ACR()
1703 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz); in dce_v10_0_afmt_update_ACR()
1707 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_0, HDMI_ACR_CTS_48, acr.cts_48khz); in dce_v10_0_afmt_update_ACR()
1710 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_1, HDMI_ACR_N_48, acr.n_48khz); in dce_v10_0_afmt_update_ACR()
/linux-4.4.14/drivers/video/fbdev/
Dcg14.c110 u8 acr; /* Aux Control */ member
/linux-4.4.14/drivers/atm/
Diphase.h255 u_short acr; member
Diphase.c1831 vc->acr = cellrate_to_float(iadev->LineRate);
1833 vc->acr = cellrate_to_float(vcc->qos.txtp.pcr);
1835 vcc->qos.txtp.max_pcr,vc->acr);)