Searched refs:__v (Results 1 – 24 of 24) sorted by relevance
33 ({ u8 __v = (*(__force volatile u8 *) (addr)); __v; })35 ({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })37 ({ u32 __v = (*(__force volatile u32 *) (addr)); __v; })39 ({ u16 __v = le16_to_cpu(*(__force volatile __le16 *) (addr)); __v; })41 ({ u32 __v = le32_to_cpu(*(__force volatile __le32 *) (addr)); __v; })89 ({ u16 __v = (*(__force volatile u16 *) (addr)); __v >>= 8; __v; })91 ({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })93 ({ u16 __v = le16_to_cpu(*(__force volatile u16 *) (addr)); __v; })96 ({u8 __w, __v = (b); u32 _addr = ((u32) (addr)); \97 __w = ((*(__force volatile u8 *) ((_addr | 0x10000) + (__v<<1)))); })[all …]
39 ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })41 ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })43 ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })
265 int __v = atomic_read(a); \266 LASSERTF(__v > v1 && __v < v2, "value: %d\n", __v); \272 int __v = atomic_read(a); \273 LASSERTF(__v > v1 && __v <= v2, "value: %d\n", __v); \279 int __v = atomic_read(a); \280 LASSERTF(__v >= v1 && __v < v2, "value: %d\n", __v); \286 int __v = atomic_read(a); \287 LASSERTF(__v >= v1 && __v <= v2, "value: %d\n", __v); \
37 #define ioread16be(p) ({ u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })38 #define ioread32be(p) ({ u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })132 #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })133 #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })134 #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
135 #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })136 #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })137 #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })138 #define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(); __v; })179 #define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; …180 #define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; …
8 #define iterate_iovec(i, n, __v, __p, skip, STEP) { \ argument12 __v.iov_len = min(n, __p->iov_len - skip); \13 if (likely(__v.iov_len)) { \14 __v.iov_base = __p->iov_base + skip; \16 __v.iov_len -= left; \17 skip += __v.iov_len; \18 n -= __v.iov_len; \24 __v.iov_len = min(n, __p->iov_len); \25 if (unlikely(!__v.iov_len)) \27 __v.iov_base = __p->iov_base; \[all …]
254 #define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __iormb(); __v; })255 #define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \256 __raw_readw(__io(p))); __iormb(); __v; })257 #define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \258 __raw_readl(__io(p))); __iormb(); __v; })299 #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })300 #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })301 #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })408 #define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; …409 #define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; …
769 u16 __v; \772 __v = isp1362_read_data16(d); \773 RDBG("%s: Read %04x from %s[%02x]\n", __func__, __v, #r, \775 __v; \779 u32 __v; \782 __v = isp1362_read_data32(d); \783 RDBG("%s: Read %08x from %s[%02x]\n", __func__, __v, #r, \785 __v; \805 u16 __v; \806 __v = isp1362_read_reg16(d, r); \[all …]
87 long long *__v = READ_ONCE(v); \101 : "+m"(*__v), "=&e"(val) \138 long long *__v = READ_ONCE(v); \152 : "+m"(*__v), "=&e"(old), "=e"(tmp) \
846 u32 __v; \848 SMC_GET_MII_ACC((lp), __v); \849 } while ( __v & MII_ACC_MII_BUSY_ ); \853 SMC_GET_MII_ACC( (lp), __v); \854 } while ( __v & MII_ACC_MII_BUSY_ ); \859 u32 __v; \861 SMC_GET_MII_ACC((lp), __v); \862 } while ( __v & MII_ACC_MII_BUSY_ ); \868 SMC_GET_MII_ACC((lp), __v); \869 } while ( __v & MII_ACC_MII_BUSY_ ); \[all …]
1002 unsigned int __v; \1003 __v = SMC_inw(ioaddr, ADDR0_REG(lp)); \1004 addr[0] = __v; addr[1] = __v >> 8; \1005 __v = SMC_inw(ioaddr, ADDR1_REG(lp)); \1006 addr[2] = __v; addr[3] = __v >> 8; \1007 __v = SMC_inw(ioaddr, ADDR2_REG(lp)); \1008 addr[4] = __v; addr[5] = __v >> 8; \
41 u32 __v; \43 : "=r" (__v) : : "cc"); \44 __v; \
75 u32 __v; \77 : "=r" (__v) : : "cc"); \78 __v; \
38 #define readb_relaxed(c) ({ u8 __v = ioswabb(__raw_readb(c)); __v; })39 #define readw_relaxed(c) ({ u16 __v = ioswabw(__raw_readw(c)); __v; })40 #define readl_relaxed(c) ({ u32 __v = ioswabl(__raw_readl(c)); __v; })41 #define readq_relaxed(c) ({ u64 __v = ioswabq(__raw_readq(c)); __v; })
42 unsigned long __v; \50 : "=r" (__v) : "m" (*(p)), "r" (n)); \51 __v; \
95 type __v; \98 __v = *__p++; \100 __v; \156 u64 __v; \157 if (__dw_read_encoded_value(&ptr, end, &__v, enc)) { \160 __v; \
899 #define ADD(__n, __v) \ in ctf_writer__setup_env() argument901 if (bt_ctf_writer_add_environment_field(writer, __n, __v)) \ in ctf_writer__setup_env()923 #define SET(__n, __v) \ in ctf_writer__setup_clock() argument925 if (bt_ctf_clock_set_##__n(clock, __v)) \ in ctf_writer__setup_clock()
29 u32 __v; \33 : "=d" (__v) \36 __v; })
459 u32 __v; \461 __v = gem_readl((__bp), __reg); \463 __v = macb_readl((__bp), __reg); \464 __v; \
357 u64 __v; \359 case 4: __v = (val).wval; break; \360 case 8: __v = (val).dval; break; \363 __v; \
113 #define ether3_inb(r) ({ unsigned int __v = readb((r)); udelay(1); __v; })114 #define ether3_inw(r) ({ unsigned int __v = readw((r)); udelay(1); __v; })
1292 UWtype __u = (u), __v = (v); \1296 __vl = __ll_lowpart(__v); \1297 __vh = __ll_highpart(__v); \
274 #define s5pcsis_write(__csis, __r, __v) writel(__v, __csis->regs + __r) argument
1658 #define TPV_Q(__v, __id1, __id2, __bv1, __bv2) \ argument1659 { .vendor = (__v), \1665 #define TPV_Q_X(__v, __bid1, __bid2, __bv1, __bv2, \ argument1667 { .vendor = (__v), \