Searched refs:__region_CS1 (Results 1 - 7 of 7) sorted by relevance

/linux-4.4.14/arch/frv/include/asm/
H A Dmb86943a.h17 #define __reg_MB86943_sl_ctl *(volatile uint32_t *) (__region_CS1 + 0x00)
28 #define __reg_MB86943_ecs_ctl(N) *(volatile uint32_t *) (__region_CS1 + 0x08 + (0x08*(N)))
29 #define __reg_MB86943_ecs_range(N) *(volatile uint32_t *) (__region_CS1 + 0x20 + (0x10*(N)))
30 #define __reg_MB86943_ecs_base(N) *(volatile uint32_t *) (__region_CS1 + 0x28 + (0x10*(N)))
32 #define __reg_MB86943_sl_pci_io_range *(volatile uint32_t *) (__region_CS1 + 0x50)
33 #define __reg_MB86943_sl_pci_io_base *(volatile uint32_t *) (__region_CS1 + 0x58)
34 #define __reg_MB86943_sl_pci_mem_range *(volatile uint32_t *) (__region_CS1 + 0x60)
35 #define __reg_MB86943_sl_pci_mem_base *(volatile uint32_t *) (__region_CS1 + 0x68)
36 #define __reg_MB86943_pci_sl_io_base *(volatile uint32_t *) (__region_CS1 + 0x70)
37 #define __reg_MB86943_pci_sl_mem_base *(volatile uint32_t *) (__region_CS1 + 0x78)
H A Dax88796.h17 #define AX88796_IOADDR (__region_CS1 + 0x200)
H A Dmb-regs.h56 #define __region_CS1 0xfc000000 /* SLBUS/PCI bridge control registers */ macro
147 #define __region_CS1 0xfc100000 /* LAN registers */ macro
/linux-4.4.14/arch/frv/mb93090-mb00/
H A Dpci-vdk.c60 #define __set_PciCfgAddr(A) writel((A), (volatile void __iomem *) __region_CS1 + 0x80)
62 #define __get_PciCfgDataB(A) readb((volatile void __iomem *) __region_CS1 + 0x88 + ((A) & 3))
63 #define __get_PciCfgDataW(A) readw((volatile void __iomem *) __region_CS1 + 0x88 + ((A) & 2))
64 #define __get_PciCfgDataL(A) readl((volatile void __iomem *) __region_CS1 + 0x88)
67 writeb((V), (volatile void __iomem *) __region_CS1 + 0x88 + (3 - ((A) & 3)))
70 writew((V), (volatile void __iomem *) __region_CS1 + 0x88 + (2 - ((A) & 2)))
73 writel((V), (volatile void __iomem *) __region_CS1 + 0x88)
75 #define __get_PciBridgeDataB(A) readb((volatile void __iomem *) __region_CS1 + 0x800 + (A))
76 #define __get_PciBridgeDataW(A) readw((volatile void __iomem *) __region_CS1 + 0x800 + (A))
77 #define __get_PciBridgeDataL(A) readl((volatile void __iomem *) __region_CS1 + 0x800 + (A))
79 #define __set_PciBridgeDataB(A,V) writeb((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A))
80 #define __set_PciBridgeDataW(A,V) writew((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A))
81 #define __set_PciBridgeDataL(A,V) writel((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A))
331 *(volatile uint32_t *) (__region_CS1 + 0x848) = 0xe0000000; pcibios_init()
332 *(volatile uint32_t *) (__region_CS1 + 0x8b8) = 0x00000000; pcibios_init()
/linux-4.4.14/arch/frv/kernel/
H A Dhead-mmu-fr451.S93 sethi.p %hi(__region_CS1),gr4
94 setlo %lo(__region_CS1),gr4
H A Dhead-uc-fr401.S100 sethi.p %hi(__region_CS1),gr4
101 setlo %lo(__region_CS1),gr4
H A Dhead-uc-fr555.S86 sethi.p %hi(__region_CS1),gr4
87 setlo %lo(__region_CS1),gr4

Completed in 302 milliseconds