Searched refs:__reg16 (Results 1 – 12 of 12) sorted by relevance
21 #define __reg16 (volatile unsigned short *) macro26 #define __reg16 macro31 #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)32 #define PLD_CFSTS __reg16(PLD_BASE + 0x0002)33 #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)34 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)35 #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)36 #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)39 #define PLD_MMCCR __reg16(PLD_BASE + 0x4000)40 #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)[all …]
24 #define __reg16 (volatile unsigned short *) macro29 #define __reg16 macro34 #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)35 #define PLD_CFSTS __reg16(PLD_BASE + 0x0002)36 #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)37 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)38 #define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)39 #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)40 #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)41 #define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010)[all …]
38 #define OPSPUT_LCD_ICUISTS __reg16(OPSPUT_LCD_BASE + 0x300002)43 #define OPSPUT_LCD_ICUIREQ0 __reg16(OPSPUT_LCD_BASE + 0x300004)44 #define OPSPUT_LCD_ICUIREQ1 __reg16(OPSPUT_LCD_BASE + 0x300006)45 #define OPSPUT_LCD_ICUCR1 __reg16(OPSPUT_LCD_BASE + 0x300020)46 #define OPSPUT_LCD_ICUCR2 __reg16(OPSPUT_LCD_BASE + 0x300022)47 #define OPSPUT_LCD_ICUCR3 __reg16(OPSPUT_LCD_BASE + 0x300024)48 #define OPSPUT_LCD_ICUCR4 __reg16(OPSPUT_LCD_BASE + 0x300026)49 #define OPSPUT_LCD_ICUCR16 __reg16(OPSPUT_LCD_BASE + 0x300030)50 #define OPSPUT_LCD_ICUCR17 __reg16(OPSPUT_LCD_BASE + 0x300032)51 #define OPSPUT_LCD_ICUCR18 __reg16(OPSPUT_LCD_BASE + 0x300034)[all …]
43 #define OPSPUT_LAN_ICUISTS __reg16(OPSPUT_LAN_BASE + 0xc0002)48 #define OPSPUT_LAN_ICUIREQ0 __reg16(OPSPUT_LAN_BASE + 0xc0004)49 #define OPSPUT_LAN_ICUCR1 __reg16(OPSPUT_LAN_BASE + 0xc0010)50 #define OPSPUT_LAN_ICUCR3 __reg16(OPSPUT_LAN_BASE + 0xc0014)
28 #define __reg16 (volatile unsigned short *) macro33 #define __reg16 macro38 #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)39 #define PLD_CFSTS __reg16(PLD_BASE + 0x0002)40 #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)41 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)42 #define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)43 #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)44 #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)45 #define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010)[all …]
38 #define M32700UT_LCD_ICUISTS __reg16(M32700UT_LCD_BASE + 0x300002)43 #define M32700UT_LCD_ICUIREQ0 __reg16(M32700UT_LCD_BASE + 0x300004)44 #define M32700UT_LCD_ICUIREQ1 __reg16(M32700UT_LCD_BASE + 0x300006)45 #define M32700UT_LCD_ICUCR1 __reg16(M32700UT_LCD_BASE + 0x300020)46 #define M32700UT_LCD_ICUCR2 __reg16(M32700UT_LCD_BASE + 0x300022)47 #define M32700UT_LCD_ICUCR3 __reg16(M32700UT_LCD_BASE + 0x300024)48 #define M32700UT_LCD_ICUCR4 __reg16(M32700UT_LCD_BASE + 0x300026)49 #define M32700UT_LCD_ICUCR16 __reg16(M32700UT_LCD_BASE + 0x300030)50 #define M32700UT_LCD_ICUCR17 __reg16(M32700UT_LCD_BASE + 0x300032)51 #define M32700UT_LCD_ICUCR18 __reg16(M32700UT_LCD_BASE + 0x300034)[all …]
43 #define M32700UT_LAN_ICUISTS __reg16(M32700UT_LAN_BASE + 0xc0002)48 #define M32700UT_LAN_ICUIREQ0 __reg16(M32700UT_LAN_BASE + 0xc0004)49 #define M32700UT_LAN_ICUCR1 __reg16(M32700UT_LAN_BASE + 0xc0010)50 #define M32700UT_LAN_ICUCR3 __reg16(M32700UT_LAN_BASE + 0xc0014)
30 #define __reg16 (volatile unsigned short *) macro35 #define __reg16 macro40 #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)41 #define PLD_CFSTS __reg16(PLD_BASE + 0x0002)42 #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)43 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)46 #define PLD_MMCCR __reg16(PLD_BASE + 0x4000)47 #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)48 #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)49 #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)[all …]
27 #define __reg16(ADDR) (*(volatile unsigned short *)(__region_CS2 + (ADDR))) macro29 #define __get_IMR() ({ __reg16(0x0a); })30 #define __set_IMR(M) do { __reg16(0x0a) = (M); wmb(); } while(0)31 #define __get_IFR() ({ __reg16(0x02); })32 #define __clr_IFR(M) do { __reg16(0x02) = ~(M); wmb(); } while(0)
27 #define __reg16(ADDR) (*(volatile unsigned short *)(ADDR)) macro29 #define __get_IMR() ({ __reg16(0xffc00004); })30 #define __set_IMR(M) do { __reg16(0xffc00004) = (M); wmb(); } while(0)31 #define __get_IFR() ({ __reg16(0xffc0000c); })32 #define __clr_IFR(M) do { __reg16(0xffc0000c) = ~(M); wmb(); } while(0)
45 #define __reg16(ADDR) (*(volatile unsigned short *)(ADDR)) macro