Searched refs:WILC_SPI_REG_BASE (Results 1 – 2 of 2) sorted by relevance
88 #define WILC_SPI_REG_BASE 0xe800 macro89 #define WILC_SPI_CTL (WILC_SPI_REG_BASE)90 #define WILC_SPI_MASTER_DMA_ADDR (WILC_SPI_REG_BASE + 0x4)91 #define WILC_SPI_MASTER_DMA_COUNT (WILC_SPI_REG_BASE + 0x8)92 #define WILC_SPI_SLAVE_DMA_ADDR (WILC_SPI_REG_BASE + 0xc)93 #define WILC_SPI_SLAVE_DMA_COUNT (WILC_SPI_REG_BASE + 0x10)94 #define WILC_SPI_TX_MODE (WILC_SPI_REG_BASE + 0x20)95 #define WILC_SPI_PROTOCOL_CONFIG (WILC_SPI_REG_BASE + 0x24)96 #define WILC_SPI_INTR_CTL (WILC_SPI_REG_BASE + 0x2c)98 #define WILC_SPI_PROTOCOL_OFFSET (WILC_SPI_PROTOCOL_CONFIG - WILC_SPI_REG_BASE)
1045 ret = spi_internal_read(0xe840 - WILC_SPI_REG_BASE, size); in spi_read_size()1073 ret = spi_internal_read(0xe840 - WILC_SPI_REG_BASE, int_status); in spi_read_int()1129 ret = spi_internal_write(0xe844 - WILC_SPI_REG_BASE, val); in spi_clear_int_ext()