Searched refs:VCLK_SRC_SEL_CPUCLK (Results 1 – 2 of 2) sorted by relevance
920 #define VCLK_SRC_SEL_CPUCLK 0x00 macro
1392 OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_CPUCLK, ~VCLK_SRC_SEL_MASK); in radeon_write_pll_regs()