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Searched refs:VBLANK_ACK (Results 1 – 8 of 8) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/radeon/
Devergreen.c4863 WREG32(VBLANK_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VBLANK_ACK); in evergreen_irq_ack()
4867 WREG32(VBLANK_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VBLANK_ACK); in evergreen_irq_ack()
4877 WREG32(VBLANK_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VBLANK_ACK); in evergreen_irq_ack()
4881 WREG32(VBLANK_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VBLANK_ACK); in evergreen_irq_ack()
4892 WREG32(VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK); in evergreen_irq_ack()
4896 WREG32(VBLANK_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VBLANK_ACK); in evergreen_irq_ack()
Dsi.c6274 WREG32(VBLANK_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VBLANK_ACK); in si_irq_ack()
6278 WREG32(VBLANK_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VBLANK_ACK); in si_irq_ack()
6288 WREG32(VBLANK_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VBLANK_ACK); in si_irq_ack()
6292 WREG32(VBLANK_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VBLANK_ACK); in si_irq_ack()
6303 WREG32(VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK); in si_irq_ack()
6307 WREG32(VBLANK_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VBLANK_ACK); in si_irq_ack()
Dsid.h813 # define VBLANK_ACK (1 << 4) macro
Dcik.c7697 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VBLANK_ACK); in cik_irq_ack()
7701 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VBLANK_ACK); in cik_irq_ack()
7713 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VBLANK_ACK); in cik_irq_ack()
7717 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VBLANK_ACK); in cik_irq_ack()
7730 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK); in cik_irq_ack()
7734 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VBLANK_ACK); in cik_irq_ack()
Dcikd.h886 # define VBLANK_ACK (1 << 4) macro
Devergreend.h1278 # define VBLANK_ACK (1 << 4) macro
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Ddce_v11_0.c3393 tmp = REG_SET_FIELD(tmp, LB_VBLANK_STATUS, VBLANK_ACK, 1); in dce_v11_0_crtc_vblank_int_ack()
Ddce_v10_0.c3400 tmp = REG_SET_FIELD(tmp, LB_VBLANK_STATUS, VBLANK_ACK, 1); in dce_v10_0_crtc_vblank_int_ack()