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Searched refs:VAL (Results 1 – 34 of 34) sorted by relevance

/linux-4.4.14/arch/arm64/kernel/
Dhw_breakpoint.c69 #define READ_WB_REG_CASE(OFF, N, REG, VAL) \ argument
71 AARCH64_DBG_READ(N, REG, VAL); \
74 #define WRITE_WB_REG_CASE(OFF, N, REG, VAL) \ argument
76 AARCH64_DBG_WRITE(N, REG, VAL); \
79 #define GEN_READ_WB_REG_CASES(OFF, REG, VAL) \ argument
80 READ_WB_REG_CASE(OFF, 0, REG, VAL); \
81 READ_WB_REG_CASE(OFF, 1, REG, VAL); \
82 READ_WB_REG_CASE(OFF, 2, REG, VAL); \
83 READ_WB_REG_CASE(OFF, 3, REG, VAL); \
84 READ_WB_REG_CASE(OFF, 4, REG, VAL); \
[all …]
/linux-4.4.14/arch/arm/kernel/
Dhw_breakpoint.c59 #define READ_WB_REG_CASE(OP2, M, VAL) \ argument
61 ARM_DBG_READ(c0, c ## M, OP2, VAL); \
64 #define WRITE_WB_REG_CASE(OP2, M, VAL) \ argument
66 ARM_DBG_WRITE(c0, c ## M, OP2, VAL); \
69 #define GEN_READ_WB_REG_CASES(OP2, VAL) \ argument
70 READ_WB_REG_CASE(OP2, 0, VAL); \
71 READ_WB_REG_CASE(OP2, 1, VAL); \
72 READ_WB_REG_CASE(OP2, 2, VAL); \
73 READ_WB_REG_CASE(OP2, 3, VAL); \
74 READ_WB_REG_CASE(OP2, 4, VAL); \
[all …]
/linux-4.4.14/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_hdr.h642 #define QLC_DEV_SET_REF_CNT(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument
643 #define QLC_DEV_CLR_REF_CNT(VAL, FN) ((VAL) &= ~(1 << (FN * 4))) argument
644 #define QLC_DEV_SET_RST_RDY(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument
645 #define QLC_DEV_SET_QSCNT_RDY(VAL, FN) ((VAL) |= (2 << (FN * 4))) argument
646 #define QLC_DEV_CLR_RST_QSCNT(VAL, FN) ((VAL) &= ~(3 << (FN * 4))) argument
648 #define QLC_DEV_GET_DRV(VAL, FN) (0xf & ((VAL) >> (FN * 4))) argument
649 #define QLC_DEV_SET_DRV(VAL, FN) ((VAL) << (FN * 4)) argument
679 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
Dqlcnic_83xx_hw.h406 #define QLC_83XX_GET_FUNC_PRIVILEGE(VAL, FN) (0x3 & ((VAL) >> (FN * 2))) argument
407 #define QLC_83XX_SET_FUNC_OPMODE(VAL, FN) ((VAL) << (FN * 2)) argument
Dqlcnic.h883 #define QLCNIC_IS_LB_CONFIGURED(VAL) \ argument
884 (VAL == (QLCNIC_LINKEVENT | QLCNIC_LB_RESPONSE))
/linux-4.4.14/drivers/gpio/
Dgpio-it87.c43 #define VAL 0x2f macro
105 outb(0x02, VAL); in superio_exit()
112 outb(ldn, VAL); in superio_select()
118 return inb(VAL); in superio_inb()
124 outb(val, VAL); in superio_outb()
132 val = inb(VAL) << 8; in superio_inw()
134 val |= inb(VAL); in superio_inw()
141 outb(val >> 8, VAL); in superio_outw()
143 outb(val, VAL); in superio_outw()
/linux-4.4.14/drivers/watchdog/
Dit8712f_wdt.c62 #define VAL 0x2f /* The value to read/write */ macro
100 return inb(VAL); in superio_inb()
106 outb(val, VAL); in superio_outb()
113 val = inb(VAL) << 8; in superio_inw()
115 val |= inb(VAL); in superio_inw()
122 outb(ldn, VAL); in superio_select()
143 outb(0x02, VAL); in superio_exit()
Dit87_wdt.c65 #define VAL 0x2f macro
192 outb(0x02, VAL); in superio_exit()
199 outb(ldn, VAL); in superio_select()
205 return inb(VAL); in superio_inb()
211 outb(val, VAL); in superio_outb()
218 val = inb(VAL) << 8; in superio_inw()
220 val |= inb(VAL); in superio_inw()
227 outb(val >> 8, VAL); in superio_outw()
229 outb(val, VAL); in superio_outw()
/linux-4.4.14/arch/arm64/include/asm/
Dhw_breakpoint.h99 #define AARCH64_DBG_READ(N, REG, VAL) do {\ argument
100 asm volatile("mrs %0, dbg" REG #N "_el1" : "=r" (VAL));\
103 #define AARCH64_DBG_WRITE(N, REG, VAL) do {\ argument
104 asm volatile("msr dbg" REG #N "_el1, %0" :: "r" (VAL));\
/linux-4.4.14/arch/arm/include/asm/
Dhw_breakpoint.h105 #define ARM_DBG_READ(N, M, OP2, VAL) do {\ argument
106 asm volatile("mrc p14, 0, %0, " #N "," #M ", " #OP2 : "=r" (VAL));\
109 #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\ argument
110 asm volatile("mcr p14, 0, %0, " #N "," #M ", " #OP2 : : "r" (VAL));\
/linux-4.4.14/drivers/net/ethernet/qlogic/netxen/
Dnetxen_nic_hdr.h966 #define NETXEN_DIMM_MEMTYPE(VAL) ((VAL >> 3) & 0xf) argument
967 #define NETXEN_DIMM_NUMROWS(VAL) ((VAL >> 7) & 0xf) argument
968 #define NETXEN_DIMM_NUMCOLS(VAL) ((VAL >> 11) & 0xf) argument
969 #define NETXEN_DIMM_NUMRANKS(VAL) ((VAL >> 15) & 0x3) argument
970 #define NETXEN_DIMM_DATAWIDTH(VAL) ((VAL >> 18) & 0x3) argument
971 #define NETXEN_DIMM_NUMBANKS(VAL) ((VAL >> 21) & 0xf) argument
972 #define NETXEN_DIMM_TYPE(VAL) ((VAL >> 25) & 0x3f) argument
1007 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
/linux-4.4.14/include/linux/
Ddma-mapping.h309 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) argument
311 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) argument
316 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) argument
318 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) argument
/linux-4.4.14/drivers/rtc/
Drtc-at32ap700x.c75 now = rtc_readl(rtc, VAL); in at32_rtc_readtime()
89 rtc_writel(rtc, VAL, now); in at32_rtc_settime()
114 rtc_unix_time = rtc_readl(rtc, VAL); in at32_rtc_setalarm()
145 if (rtc_readl(rtc, VAL) > rtc->alarm_time) { in at32_rtc_alarm_irq_enable()
179 rtc_writel(rtc, VAL, rtc->alarm_time); in at32_rtc_interrupt()
/linux-4.4.14/drivers/scsi/
Dsun3x_esp.c44 #define dma_write32(VAL, REG) \
45 writel((VAL), esp->dma_regs + (REG))
49 #define dma_write32(VAL, REG) \ argument
50 do { *(volatile u32 *)(esp->dma_regs + (REG)) = (VAL); } while (0)
Daha152x.h288 #define SETPORT(PORT, VAL) outb( (VAL), (PORT) ) argument
Dmac_esp.c49 #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG) argument
Dsun_esp.c32 #define dma_write32(VAL, REG) \ argument
33 sbus_writel((VAL), esp->dma_regs + (REG))
Desp_scsi.c116 #define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG) argument
/linux-4.4.14/drivers/staging/comedi/drivers/
Ds626.h366 #define S626_I2C_B2(ATTR, VAL) (((ATTR) << 6) | ((VAL) << 24)) argument
367 #define S626_I2C_B1(ATTR, VAL) (((ATTR) << 4) | ((VAL) << 16)) argument
368 #define S626_I2C_B0(ATTR, VAL) (((ATTR) << 2) | ((VAL) << 8)) argument
/linux-4.4.14/drivers/hwmon/
Dsmsc47b397.c55 #define VAL 0x2f /* The value to read/write */ macro
60 outb(val, VAL); in superio_outb()
66 return inb(VAL); in superio_inb()
Dsmsc47m1.c57 #define VAL 0x2f /* The value to read/write */ macro
63 outb(val, VAL); in superio_outb()
70 return inb(VAL); in superio_inb()
Dit87.c85 #define VAL 0x2f /* The value to read/write */ macro
97 return inb(VAL); in superio_inb()
103 outb(val, VAL); in superio_outb()
110 val = inb(VAL) << 8; in superio_inw()
112 val |= inb(VAL); in superio_inw()
119 outb(ldn, VAL); in superio_select()
140 outb(0x02, VAL); in superio_exit()
/linux-4.4.14/drivers/net/ethernet/freescale/fs_enet/
Dmii-fec.c47 #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff)) argument
Dmac-fcc.c74 #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff)) argument
/linux-4.4.14/arch/sparc/include/asm/
Dtsb.h112 #define TSB_STORE(ADDR, VAL) \ argument
113 661: stxa VAL, [ADDR] ASI_N; \
116 stxa VAL, [ADDR] ASI_PHYS_USE_EC; \
/linux-4.4.14/drivers/scsi/qla4xxx/
Dql4_nx.h764 #define ISR_IS_LEGACY_INTR_IDLE(VAL) (((VAL) & 0x300) == 0) argument
765 #define ISR_IS_LEGACY_INTR_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
/linux-4.4.14/drivers/scsi/qla2xxx/
Dqla_nx.h703 #define ISR_IS_LEGACY_INTR_IDLE(VAL) (((VAL) & 0x300) == 0) argument
704 #define ISR_IS_LEGACY_INTR_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
/linux-4.4.14/tools/power/cpupower/po/
Dde.po683 " -b, --perf-bias [VAL] Sets CPU's power vs performance policy on some\n"
690 " -m, --sched-mc [VAL] Sets the kernel's multi core scheduler policy.\n"
696 " -s, --sched-smt [VAL] Sets the kernel's thread sibling scheduler "
Dit.po680 " -b, --perf-bias [VAL] Sets CPU's power vs performance policy on some\n"
687 " -m, --sched-mc [VAL] Sets the kernel's multi core scheduler policy.\n"
693 " -s, --sched-smt [VAL] Sets the kernel's thread sibling scheduler "
Dcs.po672 " -b, --perf-bias [VAL] Sets CPU's power vs performance policy on some\n"
679 " -m, --sched-mc [VAL] Sets the kernel's multi core scheduler policy.\n"
685 " -s, --sched-smt [VAL] Sets the kernel's thread sibling scheduler "
Dfr.po672 " -b, --perf-bias [VAL] Sets CPU's power vs performance policy on some\n"
679 " -m, --sched-mc [VAL] Sets the kernel's multi core scheduler policy.\n"
685 " -s, --sched-smt [VAL] Sets the kernel's thread sibling scheduler "
Dpt.po682 " -b, --perf-bias [VAL] Sets CPU's power vs performance policy on some\n"
689 " -m, --sched-mc [VAL] Sets the kernel's multi core scheduler policy.\n"
695 " -s, --sched-smt [VAL] Sets the kernel's thread sibling scheduler "
/linux-4.4.14/drivers/block/
Dskd_main.c356 #define SKD_WRITEL(DEV, VAL, OFF) skd_reg_write32(DEV, VAL, OFF) argument
358 #define SKD_WRITEQ(DEV, VAL, OFF) skd_reg_write64(DEV, VAL, OFF) argument
/linux-4.4.14/Documentation/
Dkernel-parameters.txt1825 separated list of "[ID:]VAL" where ID is
1840 The VAL specifies the configuration to force. As long