Searched refs:UTSR1_TBY (Results 1 – 4 of 4) sorted by relevance
18 #define UTSR1_TBY 0x00000001 /* Transmitter BusY (read) */ macro66 tst \rd, #UTSR1_TBY
333 return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT; in sa1100_tx_empty()498 while (UART_GET_UTSR1(sport) & UTSR1_TBY) in sa1100_set_termios()740 } while (status & UTSR1_TBY); in sa1100_console_write()
240 while (Ser2UTSR1 & UTSR1_TBY); in sa1100_irda_sirtxdma_irq()
393 #define UTSR1_TBY 0x00000001 /* Transmitter BusY (read) */ macro