Searched refs:UART011_ICR (Results 1 – 2 of 2) sorted by relevance
56 #define UART011_ICR 0x44 /* Interrupt clear register. */ macro
809 uap->port.membase + UART011_ICR); in pl011_dma_rx_chars()1344 writew(0x00, uap->port.membase + UART011_ICR); in check_apply_cts_event_workaround()1351 dummy_read = readw(uap->port.membase + UART011_ICR); in check_apply_cts_event_workaround()1352 dummy_read = readw(uap->port.membase + UART011_ICR); in check_apply_cts_event_workaround()1372 uap->port.membase + UART011_ICR); in pl011_int()1480 writew(readw(regs + UART011_MIS), regs + UART011_ICR); in pl011_quiesce_irqs()1550 UART011_RTIS | UART011_RXIS, uap->port.membase + UART011_ICR); in pl011_hwinit()1602 uap->port.membase + UART011_ICR); in pl011_enable_interrupts()1718 writew(0xffff, uap->port.membase + UART011_ICR); in pl011_disable_interrupts()2338 writew(0xffff, uap->port.membase + UART011_ICR); in pl011_register_port()