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Searched refs:UART (Results 1 – 166 of 166) sorted by relevance

/linux-4.4.14/Documentation/devicetree/bindings/serial/
Drenesas,sci-serial.txt7 - "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART.
8 - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART.
9 - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART.
10 - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART.
11 - "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART.
12 - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART.
13 - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART.
14 - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART.
15 - "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART.
16 - "renesas,scifb-r8a7790" for R8A7790 (R-Car H2) SCIFB compatible UART.
[all …]
Dcirrus,clps711x-uart.txt1 * Cirrus Logic CLPS711X Universal Asynchronous Receiver/Transmitter (UART)
6 - interrupts: Should contain UART TX and RX interrupt.
7 - clocks: Should contain UART core clock number.
8 - syscon: Phandle to SYSCON node, which contain UART control bits.
14 Note: Each UART port should have an alias correctly numbered
Dcdns,uart.txt1 Binding for Cadence UART Controller
5 - reg: Should contain UART controller registers location and length.
6 - interrupts: Should contain UART controller interrupts.
7 - clocks: Must contain phandles to the UART clocks
Darc-uart.txt1 * Synopsys ARC UART : Non standard UART used in some of the ARC FPGA boards
7 - clock-frequency : the input clock frequency for the UART
8 - current-speed : baud rate for UART
Dqcom,msm-uart.txt1 * MSM Serial UART
3 The MSM serial UART hardware is designed for low-speed use cases where a
10 - reg: Should contain UART register location and length.
11 - interrupts: Should contain UART interrupt.
Dnvidia,tegra20-hsuart.txt1 NVIDIA Tegra20/Tegra30 high speed (DMA based) UART controller driver.
5 - reg: Should contain UART controller registers location and length.
6 - interrupts: Should contain UART controller interrupts.
21 only if all 8 lines of UART controller are pinmuxed.
D8250.txt1 * UART (Universal Asynchronous Receiver/Transmitter)
26 - clock-frequency : the input clock frequency for the UART
32 - current-speed : the current active speed of the UART.
37 accesses to the UART (e.g. TI davinci).
42 - fifo-size: the fifo size of the UART.
Daltera_uart.txt1 Altera UART
8 - clock-frequency : frequency of the clock input to the UART
Dqcom,msm-uartdm.txt5 software perspective it's mostly compatible with the MSM serial UART except
16 - reg: Should contain UART register locations and lengths. The first
21 - interrupts: Should contain UART interrupt.
37 The alias serialN will result in the UART being assigned port N. If any
38 serialN alias exists, then an alias must exist for each enabled UART. The
Dsamsung_uart.txt1 * Samsung's UART Controller
3 The Samsung's UART controller is used for interfacing SoC with serial
33 - samsung,uart-fifosize: The fifo size supported by the UART channel
35 Note: Each Samsung UART should have an alias correctly numbered in the
Dcavium-uart.txt1 * Universal Asynchronous Receiver/Transmitter (UART)
7 - reg: The base address of the UART register bank.
Dbrcm,bcm6345-uart.txt1 * BCM63xx UART
7 - reg: The base address of the UART register bank.
Dfsl-mxs-auart.txt1 * Freescale MXS Application UART (AUART)
14 - fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines
16 it also means you enable the DMA support for this UART.
Darm_sbsa_uart.txt1 * ARM SBSA defined generic UART
2 This UART uses a subset of the PL011 registers and consequently lives
Dqca,ar9330-uart.txt1 * Qualcomm Atheros AR9330 High-Speed UART
19 Each UART port must have an alias correctly numbered in "aliases"
Ddigicolor-usart.txt4 UART. USART also support synchronous serial protocols like SPI and I2S. Use
14 Note: Each UART port should have an alias correctly numbered
Dsirf-uart.txt13 - rts-gpios: RTS pin for USP-based UART if sirf,uart-has-rtscts is true
14 - cts-gpios: CTS pin for USP-based UART if sirf,uart-has-rtscts is true
Domap_serial.txt1 OMAP UART controller
18 - clock-frequency : frequency of the clock input to the UART
Dmtk-uart.txt1 * Mediatek Universal Asynchronous Receiver/Transmitter (UART)
15 - reg: The base address of the UART register bank.
Dsnps-dw-apb-uart.txt1 * Synopsys DesignWare ABP UART
10 - clock-frequency : the input clock frequency for the UART.
19 configuration parameter. Define this if your UART does not implement the busy
Dmrvl-serial.txt1 PXA UART controller
Daltera_jtaguart.txt1 Altera JTAG UART
Dpl011.txt1 * ARM AMBA Primecell PL011 serial UART
14 when the UART is unused
Dsprd-uart.txt1 * Spreadtrum serial UART
Dnxp-lpc32xx-hsuart.txt1 * NXP LPC32xx SoC High Speed UART
Dnxp,sc16is7xx.txt1 * NXP SC16IS7xx advanced Universal Asynchronous Receiver-Transmitter (UART)
15 - interrupts: Should contain the UART interrupt
Defm32-uart.txt1 * Energymicro efm32 UART
Duniphier-uart.txt1 UniPhier UART controller
Daxis,etraxfs-uart.txt1 ETRAX FS UART
Dingenic,uart.txt1 * Ingenic SoC UART
Dvt8500-uart.txt1 * VIA VT8500 and WonderMedia WM8xxx UART Controller
Dfsl-imx-uart.txt1 * Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
Dnxp,lpc1850-uart.txt1 * NXP LPC1850 UART
Dmaxim,max310x.txt1 * Maxim MAX310X advanced Universal Asynchronous Receiver-Transmitter (UART)
Drs485.txt6 UART node.
Datmel-usart.txt7 For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
/linux-4.4.14/arch/arm/mach-mmp/include/mach/
Duncompress.h17 volatile unsigned long *UART; variable
22 if (!(UART[UART_IER] & UART_IER_UUE)) in putc()
25 while (!(UART[UART_LSR] & UART_LSR_THRE)) in putc()
28 UART[UART_TX] = c; in putc()
41 UART = (unsigned long *)UART2_BASE; in arch_decomp_setup()
44 UART = (unsigned long *)UART3_BASE; in arch_decomp_setup()
/linux-4.4.14/arch/arm/mach-sa1100/include/mach/
Duncompress.h20 #define UART(x) (*(volatile unsigned long *)(serial_port + (x))) macro
28 if (UART(UTCR3) & UTCR3_TXE) break; in putc()
30 if (UART(UTCR3) & UTCR3_TXE) break; in putc()
32 if (UART(UTCR3) & UTCR3_TXE) break; in putc()
37 while (!(UART(UTSR1) & UTSR1_TNF)) in putc()
41 UART(UTDR) = c; in putc()
/linux-4.4.14/arch/arm/include/debug/
Dtegra.S94 cmp \rv, #2 @ 2 and 3 mean DCC, UART
98 11: lsr \rv, \rp, #15 @ 17:15 are UART ID
100 cmp \rv, #0 @ UART 0?
102 cmp \rv, #1 @ UART 1?
104 cmp \rv, #2 @ UART 2?
106 cmp \rv, #3 @ UART 3?
108 cmp \rv, #4 @ UART 4?
150 cmp \rp, #0 @ Valid UART address?
Dvexpress.S30 @ should use UART at 0x10009000
31 @ - all other (RS1 complaint) tiles use UART mapped
Dux500.S14 #error Invalid Ux500 debug UART
/linux-4.4.14/Documentation/ABI/testing/
Dsysfs-platform-kim6 Name of the UART device at which the WL128x chip
20 UART configurations, so the baud-rate needs to be set
31 entry most often should be 1, the host's UART is required
41 use of the shared UART transport, it registers to the shared
45 daemon managing the UART, and is notified about the change
46 by the sysfs_notify. The value would be '1' when UART needs
47 to be opened/ldisc installed, and would be '0' when UART
Dsysfs-bus-i2c-devices-fsa94808 UART - UART is attached
18 UART - switch to UART path
Dsysfs-tty26 UART port in serial_core, that is bound to TTY like ttyS0.
151 The RX trigger can be set one of four kinds of values for UART
/linux-4.4.14/arch/arm/mach-gemini/include/mach/
Duncompress.h19 static volatile unsigned long * const UART = (unsigned long *)GEMINI_UART_BASE; variable
28 while (!(UART[UART_LSR] & UART_LSR_THRE)) in putc()
30 UART[UART_TX] = c; in putc()
/linux-4.4.14/arch/arm/
DKconfig.debug89 UART definition, as specified below. Attempting to boot the kernel
106 bool "Kernel low-level debugging via asm9260 UART"
110 their output to an UART or USART port on asm9260 based
145 bool "Kernel low-level debugging on BCM2835 PL011 UART"
155 bool "Kernel low-level debugging messages via BCM KONA UART"
166 bool "Kernel low-level debugging on BCM63XX UART"
170 bool "Marvell Berlin SoC Debug UART"
178 bool "Use BRCMSTB UART for low-level debug"
186 messages to appear over the UART, select this option.
273 bool "Hisilicon HI3620 Debug UART"
[all …]
/linux-4.4.14/drivers/bluetooth/
DKconfig67 tristate "HCI UART driver"
70 Bluetooth HCI UART driver.
73 UART based Bluetooth PCMCIA and CF devices like Xircom Credit Card
76 Say Y here to compile support for Bluetooth UART devices into the
80 bool "UART (H4) protocol support"
83 UART (H4) is serial protocol for communication between Bluetooth
85 with UART interface, including PCMCIA and CF cards.
87 Say Y here to compile support for HCI UART (H4) protocol.
112 Say Y here to compile support for HCI UART ATH3K protocol.
126 bool "Three-wire UART (H5) protocol support"
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/
Ducc.txt17 - port-number : for UART drivers, the port number to use, between 0 and 3.
20 CPM UART driver, the port-number is required for the QE UART driver.
21 - soft-uart : for UART drivers, if specified this means the QE UART device
22 driver should use "Soft-UART" mode, which is needed on some SOCs that have
23 broken UART hardware. Soft-UART is provided via a microcode upload.
Dfirmware.txt21 id = "Soft-UART";
/linux-4.4.14/drivers/tty/serial/
DKconfig26 This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
37 Say Y here if you wish to use an AMBA PrimeCell UART as the system
53 This selects the ARM(R) AMBA(R) PrimeCell PL011 UART. If you have
65 Say Y here if you wish to use an AMBA PrimeCell UART as the system
130 Say Y here if you wish to use an on-chip UART on a Atmel
165 Say Y if you have an external 8250/16C550 UART. If unsure, say N.
191 This selects the Micrel Centaur KS8695 UART. Say Y here.
198 Say Y here if you wish to use a KS8695 (Centaur) UART as the
216 Say Y here if you wish to use a Amlogic MesonX UART as the
263 Select the number of available UART ports for the Samsung S3C
[all …]
Dsb1250-duart.c76 #error invalid SB1250 UART configuration
Dbfin_uart.c55 # error KGDB only support UART in PIO mode.
/linux-4.4.14/drivers/nfc/nfcmrvl/
DKconfig23 tristate "Marvell NFC-over-UART driver"
27 Marvell NFC-over-UART driver.
29 This driver provides support for Marvell NFC-over-UART devices
31 Say Y here to compile support for Marvell NFC-over-UART driver
/linux-4.4.14/drivers/clk/qcom/
DKconfig18 Say Y if you want to use peripheral devices such as UART, SPI,
36 Say Y if you want to use peripheral devices such as UART, SPI,
53 Say Y if you want to use peripheral devices such as UART, SPI,
62 Say Y if you want to use devices such as UART, SPI i2c, USB,
70 Say Y if you want to use peripheral devices such as UART, SPI,
97 Say Y if you want to use peripheral devices such as UART, SPI,
/linux-4.4.14/Documentation/ia64/
Dserial.txt14 or the EFI ConOut path contained only UART devices, the
55 configure EFI with a single device (either a UART or a VGA
80 or if the EFI console path contains only a UART device and the
91 - The EFI console path contains both a VGA device and a UART.
97 Make sure only one UART is selected in the EFI console
100 - You're connected to an HP MP port[2] but have a non-MP UART
103 Either move the console cable to the non-MP UART, or change
104 the EFI console path[3] to the MP UART.
/linux-4.4.14/arch/mips/mti-sead3/
Dsead3-platform.c20 #define UART(base) \ macro
31 UART(0x1f000900), /* ttyS0 = USB */
32 UART(0x1f000800), /* ttyS1 = RS232 */
/linux-4.4.14/net/nfc/nci/
DKconfig25 tristate "NCI over UART protocol support"
28 Say yes if you use an NCI driver that requires UART link layer.
/linux-4.4.14/arch/blackfin/mach-bf561/
DKconfig49 int "UART Error Interrupt"
106 int "DMA2 5 (UART RX)"
109 int "DMA2 6 (UART TX)"
206 highest priority number 7 to UART or any other device.
/linux-4.4.14/drivers/mmc/card/
DKconfig54 tristate "SDIO UART/GPS class support"
57 SDIO function driver for SDIO cards that implements the UART
58 class, as well as the GPS class which appears like a UART.
/linux-4.4.14/arch/avr32/boards/atstk1000/
DKconfig44 bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
47 the console on UART-C not UART-A.
/linux-4.4.14/Documentation/networking/caif/
DREADME32 Normally Frame Checksum is always used on UART, but this is also provided as a
97 The host seems to be able to send over the UART, at least the CAIF ldisc get
101 The host is not able to send the message from UART, the tty has not been
105 might be problems transmitting over UART.
DLinux-CAIF.txt16 and host. Currently, UART and Loopback are available for Linux.
/linux-4.4.14/Documentation/devicetree/bindings/powerpc/fsl/
Dmpc5121-psc.txt3 PSC in UART mode
6 For PSC in UART mode the needed PSC serial devices
31 Similar to the UART mode a PSC can be operated in SPI mode. The compatible used
/linux-4.4.14/drivers/tty/serial/8250/
DKconfig100 bool "DMA support for 16550 compatible UART controllers" if EXPERT
105 compatible UART controllers that support DMA signaling.
218 tristate "Support Exar ST16C554/554D Quad UART"
221 The Uplogix Envoy TU301 uses this Exar Quad UART. If you are
222 tinkering with your Envoy TU301, or have a machine with this UART,
285 present in the Synopsys DesignWare APB UART.
305 tristate "Support for OMAP internal UART (8250 based driver)"
333 tristate "Support for Fintek F81216A LPC to 4 UART"
337 LPC to 4 UART. This device has some RS485 functionality not available
356 tristate "Support for UniPhier on-chip UART"
[all …]
/linux-4.4.14/arch/blackfin/mach-bf533/
DKconfig11 int "UART ERROR"
89 highest priority number 7 to UART or any other device.
/linux-4.4.14/arch/arm/mach-ux500/
DKconfig70 int "Ux500 UART to use for low-level debug"
73 Choose the UART on which kernel low-level debug messages should be
/linux-4.4.14/Documentation/devicetree/bindings/net/nfc/
Dnfcmrvl.txt5 - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices
15 Optional UART-based chip specific properties:
/linux-4.4.14/arch/powerpc/boot/dts/
Dpcm030.dts40 psc@2400 { /* PSC3 in UART mode */
54 psc@2c00 { /* PSC6 in UART mode */
Dpcm032.dts44 psc@2400 { /* PSC3 in UART mode */
58 psc@2c00 { /* PSC6 in UART mode */
Dmpc832x_mds.dts335 soft-uart; /* We need Soft-UART */
340 * For Soft-UART, we need to set TX to 1X, which
Dcurrituck.dts100 clock-frequency = <1851851>; // PCIe refclk/MCGC0_CTL[UART]
/linux-4.4.14/arch/mips/
DKconfig.debug163 bool "CPS SMP NS16550 UART output"
166 Output debug information via an ns16550 compatible UART if exceptions
172 hex "UART Base Address"
175 The base address of the ns16550 compatible UART on which to output
179 int "UART Register Shift"
/linux-4.4.14/Documentation/devicetree/bindings/dma/
Dfsl-imx-sdma.txt31 4 MCU domain UART
32 5 Shared UART
Dste-dma40.txt73 11: UART port 2
74 12: UART port 1
75 13: UART port 0
/linux-4.4.14/Documentation/arm/Samsung-S3C24XX/
DS3C2412.txt38 UART
41 The UART hardware is similar to the S3C2440, and is supported by the
DSuspend.txt86 1) The uart drivers will disable the clocks to the UART blocks when
90 2) Whilst the pm code itself will attempt to re-enable the UART clocks,
97 For example, if you transmit a character from the UART, the baud
/linux-4.4.14/drivers/clk/tegra/
Dclk-tegra-periph.c178 #define UART(_name, _parents, _offset,\ macro
499 UART("uarta", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTA, 6, tegra_clk_uarta),
500 UART("uartb", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTB, 7, tegra_clk_uartb),
501 UART("uartc", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTC, 55, tegra_clk_uartc),
502 UART("uartd", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTD, 65, tegra_clk_uartd),
503 UART("uarte", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTE, 66, tegra_clk_uarte),
/linux-4.4.14/arch/arm/mach-s3c24xx/
Dsleep.S59 @@ load UART to allow us to print the two characters for
Dcommon.c158 IODESC_ENT(UART)
/linux-4.4.14/arch/arm64/boot/dts/hisilicon/
Dhi6220-hikey.dts21 serial1 = &uart1; /* BT UART */
/linux-4.4.14/arch/powerpc/sysdev/qe_lib/
DKconfig10 protocols: UART, BISYNC, QMC
/linux-4.4.14/Documentation/cris/
DREADME111 ttyS0 at 0xb0000060 is a builtin UART with DMA
112 ttyS1 at 0xb0000068 is a builtin UART with DMA
113 ttyS2 at 0xb0000070 is a builtin UART with DMA
114 ttyS3 at 0xb0000078 is a builtin UART with DMA
/linux-4.4.14/Documentation/devicetree/bindings/arm/keystone/
Dkeystone.txt10 type UART should use the specified compatible for those devices.
/linux-4.4.14/arch/tile/gxio/
DKconfig30 # Support direct access to the TILE-Gx UART hardware from kernel space.
/linux-4.4.14/Documentation/devicetree/bindings/clock/
Dexynos5250-clock.txt31 Example 2: UART controller node that consumes the clock generated by the clock
Damlogic,meson8b-clkc.txt31 Example: UART controller node that consumes the clock generated by the clock
Dclock-bindings.txt113 /* UART, using the low frequency oscillator for the baud clock,
126 clock signal, and a UART.
132 * The UART has its baud clock connected the external oscillator and its
Dexynos5410-clock.txt35 Example 2: UART controller node that consumes the clock generated by the clock
Dexynos5420-clock.txt32 Example 2: UART controller node that consumes the clock generated by the clock
Dexynos4-clock.txt33 Example 2: UART controller node that consumes the clock generated by the clock
Dexynos3250-clock.txt47 Example 2: UART controller node that consumes the clock generated by the clock
Dsamsung,s3c2412-clock.txt38 Example: UART controller node that consumes the clock generated by the clock
Dsamsung,s3c2410-clock.txt39 Example: UART controller node that consumes the clock generated by the clock
Drockchip,rk3288-cru.txt51 Example: UART controller node that consumes the clock generated by the clock
Dsamsung,s3c2443-clock.txt43 Example: UART controller node that consumes the clock generated by the clock
Drockchip,rk3188-cru.txt51 Example: UART controller node that consumes the clock generated by the clock
Drockchip,rk3368-cru.txt51 Example: UART controller node that consumes the clock generated by the clock
Dsamsung,s5pv210-clock.txt64 Example: UART controller node that consumes the clock generated by the clock
Dsamsung,s3c64xx-clock.txt63 Example: UART controller node that consumes the clock generated by the clock
Dexynos5260-clock.txt179 Example 2: UART controller node that consumes the clock generated by the
Dexynos5433-clock.txt17 which generates clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS IPs.
449 Example 3: UART controller node that consumes the clock generated by the clock
/linux-4.4.14/arch/powerpc/
DKconfig.debug218 UART. Xilinx chips with uartlite cannot use this option.
309 hex "Low 32 bits of early debug UART physical address"
317 hex "EPRN of early debug UART physical address"
322 hex "Early debug UART physical address"
327 hex "CPM UART early debug transmit descriptor address"
/linux-4.4.14/arch/arm/boot/dts/
Dsama5d3_uart.dtsi3 * UART support
Dimx28-tx28.dts250 /* 2nd TX-Std UART - (A)UART1 */
257 /* 3rd TX-Std UART - (A)UART3 */
282 /* 1st TX-Std UART - (D)UART */
Domap-zoom-common.dtsi8 ranges = <3 0 0x10000000 0x1000000>, /* CS3: 16MB for UART */
Dste-nomadik-s8815.dts134 /* Activate RXTX on UART 0 */
Dste-nomadik-nhk15.dts164 /* Activate RX/TX and CTS/RTS on UART 0 */
Dintegratorap.dts37 /* The UART clock is 14.74 MHz divided by an ICS525 */
Dsun8i-a23-evb.dts128 * line and get a working UART.
Dintegratorcp.dts45 /* The UART clock is 14.74 MHz divided from 25MHz by an ICS525 */
Dste-href.dtsi35 /* This UART is unused and thus left disabled */
Dkirkwood.dtsi106 * Default UART pinctrl setting without RTS/CTS,
Dste-snowball.dts233 /* This UART is unused and thus left disabled */
Darmada-370.dtsi197 * Default UART pinctrl setting without RTS/CTS, can
Dste-href-family-pinctrl.dtsi17 /* Settings for all UART default and sleep states */
/linux-4.4.14/drivers/pinctrl/
Dpinctrl-tegra210.c1419 …PINGROUP(uart2_tx_pg0, UARTB, I2S4A, SPDIF, UART, 0x30f4, N, N, N, 0x…
1420 …PINGROUP(uart2_rx_pg1, UARTB, I2S4A, SPDIF, UART, 0x30f8, N, N, N, 0x…
1421 …PINGROUP(uart2_rts_pg2, UARTB, I2S4A, RSVD2, UART, 0x30fc, N, N, N, 0x…
1422 …PINGROUP(uart2_cts_pg3, UARTB, I2S4A, RSVD2, UART, 0x3100, N, N, N, 0x…
1427 …PINGROUP(uart4_tx_pi4, UARTD, UART, RSVD2, RSVD3, 0x3114, N, N, N, 0x…
1428 …PINGROUP(uart4_rx_pi5, UARTD, UART, RSVD2, RSVD3, 0x3118, N, N, N, 0x…
1429 …PINGROUP(uart4_rts_pi6, UARTD, UART, RSVD2, RSVD3, 0x311c, N, N, N, 0x…
1430 …PINGROUP(uart4_cts_pi7, UARTD, UART, RSVD2, RSVD3, 0x3120, N, N, N, 0x…
/linux-4.4.14/arch/powerpc/platforms/8xx/
DKconfig77 (often 2-nd UART) will not work if this is enabled.
84 (often 1-nd UART) will not work if this is enabled.
/linux-4.4.14/Documentation/misc-devices/
Dspear-pcie-gadget.txt86 can also be made visible to PCIe host. E.g., if you program base address of UART
88 visible as UART.
/linux-4.4.14/arch/blackfin/mach-bf537/
DKconfig111 highest priority number 7 to UART or any other device.
/linux-4.4.14/drivers/soc/qcom/
DKconfig10 functions for connecting the underlying serial UART, SPI, and I2C
/linux-4.4.14/Documentation/devicetree/bindings/
Dchosen.txt30 For UART devices, the preferred binding is a string in the form:
Dxilinx.txt287 Xilinx UART 16550 devices are very similar to the NS16550 but with
/linux-4.4.14/drivers/net/irda/
DKconfig21 tristate "Blackfin SIR on UART"
25 Say Y here if your want to enable SIR function on Blackfin UART
34 to use that UART.
66 tristate "SuperH SIR on UART"
72 Say Y here if your want to enable SIR function on SuperH UART
/linux-4.4.14/arch/blackfin/mach-bf538/
DKconfig159 highest priority number 7 to UART or any other device.
/linux-4.4.14/Documentation/devicetree/bindings/pinctrl/
Dabilis,tb10x-iomux.txt34 - UART ports: uart0, uart1
/linux-4.4.14/arch/arm/mach-w90x900/
Dcpu.c48 IODESC_ENT(UART),
/linux-4.4.14/Documentation/devicetree/bindings/media/
Dexynos4-fimc-is.txt5 processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C
Dvideo-interfaces.txt7 controlled over an I2C, SPI or UART bus, and SoC internal IP blocks, including
/linux-4.4.14/Documentation/sound/alsa/
DALSA-Configuration.txt314 mpu_port - port # for MPU-401 UART (0x300,0x330), -1 = disabled (default)
315 mpu_irq - IRQ # for MPU-401 UART (3,5,7,9), -1 = disabled (default)
348 mpu_port - port # for MPU-401 UART (0x300,0x330), -1 = disabled (default)
349 mpu_irq - IRQ # for MPU-401 UART (5,7,9,10), -1 = disabled (default)
467 mpu_port - port # for MPU-401 UART (optional), -1 = disable
469 mpu_irq - IRQ # for MPU-401 UART
491 mpu_port - port # for MPU-401 UART (PnP setup - 0x300), -1 = disable
494 mpu_irq - IRQ # for MPU-401 UART (9,11,12,15)
1173 midi - 1 = MIDI UART enable, 0 = MIDI UART disable (default)
1196 midi - 1 = MIDI UART enable, 0 = MIDI UART disable (default)
[all …]
Dserial-u16550.txt2 Serial UART 16450/16550 MIDI driver
DCMIPCI.txt212 With CMI8338 chips, the MPU401-UART interface is disabled as default.
/linux-4.4.14/Documentation/devicetree/bindings/soc/qcom/
Dqcom,gsbi.txt31 devices. These serial devices can be a QCOM UART, I2C controller, spi
/linux-4.4.14/arch/blackfin/kernel/
Ddebug-mmrs.c545 char buf[32], *_buf = REGS_STR_PFX(buf, UART, num); in bfin_debug_mmrs_uart()
574 #define UART(num) bfin_debug_mmrs_uart(parent, UART##num##_DLL, num) macro
1564 UART(0); in bfin_debug_mmrs_init()
1567 UART(1); in bfin_debug_mmrs_init()
1570 UART(2); in bfin_debug_mmrs_init()
1573 UART(3); in bfin_debug_mmrs_init()
/linux-4.4.14/arch/arc/boot/dts/
Dabilis_tb101.dtsi132 pctl_uart0: pctl-uart0 { /* UART 0 */
135 pctl_uart1: pctl-uart1 { /* UART 1 */
Dabilis_tb100.dtsi126 pctl_uart0: pctl-uart0 { /* UART 0 */
129 pctl_uart1: pctl-uart1 { /* UART 1 */
Daxs10x_mb.dtsi114 /* UART muxed with USB data port (ttyS3) */
/linux-4.4.14/arch/arm/plat-samsung/
DKconfig31 int "S3C UART to use for low-level messages"
35 Choice of which UART port to use for the low-level messages,
/linux-4.4.14/sound/drivers/
DKconfig152 tristate "Generic MPU-401 UART driver"
156 the Roland MPU-401 interface in UART mode.
/linux-4.4.14/sound/oss/
DKconfig12 here to enable the sound chip instead of the UART. Also
14 time, since it also attempts to use this UART port.
324 synthesizers (OPL2, OPL3 and OPL4), 6850 UART MIDI Interface.
453 tristate "6850 UART support"
456 UART chip. This interface is rarely found on sound cards. It's safe
DCHANGELOG95 other MPU401 UART compatible cards than SB16/ESS/Jazz.
/linux-4.4.14/Documentation/networking/
Dbaycom.txt20 however if you have a broken UART clone that does not have working
27 does not work with your UART.
Dcan.txt131 certain UART of a serial interface, a certain sound chip in your
/linux-4.4.14/arch/arm/mach-ixp4xx/
DKconfig174 "Console" UART is available on J11 as console
175 "High Speed" UART is n/c (as far as I can tell)
/linux-4.4.14/Documentation/serial/
Dserial-rs485.txt14 Some CPUs/UARTs (e.g., Atmel AT91 or 16C950 UART) contain a built-in
Dmoxa-smartio463 uart set UART type(16450-->disable FIFO, 16550A-->enable FIFO)
/linux-4.4.14/Documentation/
Dpinctrl.txt893 Example: a pin is usually muxed in to be used as a UART TX line. But during
898 pin shall be used for UART TX and GPIO at the same time, that you will grab
899 a pin control handle and set it to a certain state to enable UART TX to be
901 to drive it low during sleep, then mux it over to UART TX again when you
914 line low as part of the usual pin control map. So for example your UART
959 everything is UART business as usual. But there is also some function
967 by that UART device to control the pins that pertain to that very UART
968 driver, putting them into modes needed by the UART. GPIO in the Linux
Ddevices.txt222 64 = /dev/ttyS0 First UART serial port
224 255 = /dev/ttyS191 192nd UART serial port
226 UART serial ports refer to 8250/16450/16550 series devices.
2749 0 = /dev/ttyLU0 LinkUp Systems L72xx UART - port 0
2750 1 = /dev/ttyLU1 LinkUp Systems L72xx UART - port 1
2751 2 = /dev/ttyLU2 LinkUp Systems L72xx UART - port 2
2752 3 = /dev/ttyLU3 LinkUp Systems L72xx UART - port 3
Dkernel-parameters.txt727 UART at the specified I/O port or MMIO address,
996 UART at the specified I/O port or MMIO address.
1032 a correct base address of the selected UART port. The
1038 Use early console provided by Freescale LP UART driver
/linux-4.4.14/arch/blackfin/mach-bf518/
DKconfig313 highest priority number 7 to UART or any other device.
/linux-4.4.14/arch/blackfin/mach-bf527/
DKconfig318 highest priority number 7 to UART or any other device.
/linux-4.4.14/arch/mips/sibyte/common/
Dsb_tbprof.c47 #error invalid SiByte UART configuration
/linux-4.4.14/arch/blackfin/mach-bf548/
DKconfig376 highest priority number 7 to UART or any other device.
/linux-4.4.14/drivers/firmware/
DKconfig72 say Y here. If your EFI ConOut path contains only a UART
/linux-4.4.14/drivers/dma/
DKconfig442 configured for different peripherals like audio, UART, SPI.
461 configured for different peripherals like audio, UART, SPI,
/linux-4.4.14/drivers/misc/
DKconfig105 The ibmasm driver also enables the OS to use the UART on the
496 stereo and mono audio, video, microphone and UART data to use
/linux-4.4.14/Documentation/arm/pxa/
Dmfp.txt49 internal controllers like PWM, SSP and UART, with 128 internal signals
/linux-4.4.14/arch/arm/mach-imx/
DKconfig28 board. On debug board, several debug devices(ethernet, UART,
/linux-4.4.14/arch/xtensa/
DKconfig275 against a well known, fixed frequency, such as an UART oscillator.
/linux-4.4.14/drivers/mfd/
DKconfig367 I2C, SPI and HS-UART starting from Intel Sunrisepoint (Intel Skylake
376 I2C, SPI and HS-UART starting from Intel Sunrisepoint (Intel Skylake
423 device may provide functions like watchdog, GPIO, UART and I2C bus.
/linux-4.4.14/drivers/tty/
DKconfig342 route trace data coming from a tty port (say UART for example) to
/linux-4.4.14/Documentation/usb/
Dusb-serial.txt315 -- Add error reporting back to application for UART error conditions.
/linux-4.4.14/Documentation/sound/oss/
DREADME.OSS458 cards (such as MPU IPC-T and MQX-32M) and with the UART only
804 "6850 UART Midi support",
806 UART interface is so rarely used.
/linux-4.4.14/drivers/usb/serial/
DKconfig136 tristate "USB CP210x family of UART Bridge Controllers"
/linux-4.4.14/arch/blackfin/
DKconfig1269 Various Peripherals such as UART, SPORT, PPI may not function as
/linux-4.4.14/arch/x86/
DKconfig542 such as I2C, UART, GPIO found on AMD Carrizo and later chipsets.
543 I2C and UART depend on COMMON_CLK to set clock. GPIO driver is
/linux-4.4.14/
DMAINTAINERS599 ALTERA UART/JTAG UART SERIAL DRIVERS
877 ARM PRIMECELL UART PL010 AND PL011 DRIVERS
4519 FREESCALE QUICC ENGINE UCC UART DRIVER