Searched refs:TLBMISS (Results 1 - 4 of 4) sorted by relevance

/linux-4.4.14/arch/parisc/include/asm/
H A Dperf.h20 #define TLBMISS 2 macro
/linux-4.4.14/arch/parisc/kernel/
H A Dperf.c381 onyx_images[TLBMISS][15] &= 0xffffff00; perf_patch_images()
383 onyx_images[TLBMISS][15] |= (0x000000ff&((dtlb_addr) >> 24)); perf_patch_images()
384 onyx_images[TLBMISS][16] = (dtlb_addr << 8)&0xffffff00; perf_patch_images()
385 onyx_images[TLBMISS][17] = itlb_addr; perf_patch_images()
408 cuda_images[TLBMISS][16] = perf_patch_images()
409 (cuda_images[TLBMISS][16]&0xffff0000) | perf_patch_images()
411 cuda_images[TLBMISS][17] = perf_patch_images()
413 cuda_images[TLBMISS][18] = (itlb_addr << 16)&0xffff0000; perf_patch_images()
/linux-4.4.14/arch/sh/mm/
H A Dtlbex_64.c141 * specific to the type of TLBMISS being handled. do_fast_page_fault()
H A Dcache-sh5.c322 * but that involves ASID switching cost + probably a TLBMISS + refill

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