Home
last modified time | relevance | path

Searched refs:TEGRA_DIVIDER_ROUND_UP (Results 1 – 8 of 8) sorted by relevance

/linux-4.4.14/drivers/clk/tegra/
Dclk-tegra-periph.c133 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
140 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
147 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
153 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
161 TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
168 TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
175 TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
182 TEGRA_DIVIDER_ROUND_UP, _clk_num, 0, _clk_id,\
188 30, MASK(2), 0, 0, 16, 0, TEGRA_DIVIDER_ROUND_UP,\
195 TEGRA_DIVIDER_ROUND_UP, _clk_num, _gate_flags,\
[all …]
Dclk-tegra20.c147 30, 2, 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
154 30, 2, 0, 0, 16, 0, TEGRA_DIVIDER_ROUND_UP, \
646 clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra20_pll_init()
661 clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra20_pll_init()
695 clk_base + PLLA_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra20_pll_init()
Dclk-divider.c47 if (flags & TEGRA_DIVIDER_ROUND_UP) in get_div()
Dclk-tegra30.c184 30, 2, 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
190 29, 3, 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
197 TEGRA_DIVIDER_ROUND_UP, _clk_num, \
933 clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra30_pll_init()
948 clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra30_pll_init()
Dclk-tegra-audio.c157 clk_base + PLLA_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra_audio_clk_init()
Dclk-tegra114.c155 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
1061 clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra114_pll_init()
1086 clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra114_pll_init()
Dclk.h79 #define TEGRA_DIVIDER_ROUND_UP BIT(0) macro
Dclk-tegra124.c1164 clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra124_pll_init()
1199 clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP, in tegra124_pll_init()