Searched refs:SSPP_VIG0 (Results 1 – 4 of 4) sorted by relevance
/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp5/ |
D | mdp5_cfg.c | 37 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4, [SSPP_VIG2] = 7, 108 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4, [SSPP_VIG2] = 7, 179 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4, 258 [SSPP_VIG0] = 1, [SSPP_DMA0] = 4, 319 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4,
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D | mdp5_ctl.c | 319 case SSPP_VIG0: return MDP5_CTL_LAYER_REG_VIG0(stage); in mdp_ctl_blend_mask() 340 case SSPP_VIG0: return MDP5_CTL_LAYER_EXT_REG_VIG0_BIT3; in mdp_ctl_blend_ext_mask() 415 case SSPP_VIG0: return MDP5_CTL_FLUSH_VIG0; in mdp_ctl_flush_mask_pipe()
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D | mdp5_kms.c | 353 SSPP_VIG0, SSPP_VIG1, SSPP_VIG2, SSPP_VIG3, in modeset_init() enumerator
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D | mdp5.xml.h | 67 SSPP_VIG0 = 0, enumerator 543 case SSPP_VIG0: return (mdp5_cfg->pipe_vig.base[0]); in __offset_PIPE()
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