Searched refs:SSP0 (Results 1 – 7 of 7) sorted by relevance
| /linux-4.4.14/drivers/pinctrl/ |
| D | pinctrl-lpc18xx.c | 228 LPC_P(1,0, GPIO, CTIN, EMC, R, R, SSP0, SGPIO, R, 0, ND);
229 LPC_P(1,1, GPIO, CTOUT, EMC, SGPIO, R, SSP0, R, R, 0, ND);
230 LPC_P(1,2, GPIO, CTOUT, EMC, SGPIO, R, SSP0, R, R, 0, ND);
263 LPC_P(3,0, I2S0_RX_SCK, I2S0_RX_MCLK, I2S0_TX_SCK, I2S0_TX_MCLK,SSP0,R,R,R, 0, ND);
266 LPC_P(3,3, R, SPI, SSP0, SPIFI, CGU_OUT,R, I2S0_TX_MCLK, I2S1, 0, HS);
269 LPC_P(3,6, GPIO, SPI, SSP0, SPIFI, R, SSP0_ALT, R, R, 0, ND);
270 LPC_P(3,7, R, SPI, SSP0, SPIFI, GPIO, SSP0_ALT, R, R, 0, ND);
271 LPC_P(3,8, R, SPI, SSP0, SPIFI, GPIO, SSP0_ALT, R, R, 0, ND);
321 LPC_P(9,0, GPIO, MCTRL, R, R, R, ENET, SGPIO, SSP0, 0, ND);
322 LPC_P(9,1, GPIO, MCTRL, R, R, I2S0_TX_WS,ENET, SGPIO, SSP0, 0, ND);
[all …]
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| /linux-4.4.14/drivers/clk/mxs/ |
| D | clk-imx28.c | 33 #define SSP0 (CLKCTRL + 0x0090) macro
200 clks[ssp0_div] = mxs_clk_div("ssp0_div", "ssp0_sel", SSP0, 0, 9, 29); in mx28_clocks_init()
219 clks[ssp0] = mxs_clk_gate("ssp0", "ssp0_div", SSP0, 31); in mx28_clocks_init()
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| /linux-4.4.14/Documentation/devicetree/bindings/reset/ |
| D | nxp,lpc1850-rgu.txt | 50 50 SSP0
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| /linux-4.4.14/Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,mxs-pinctrl.txt | 34 particular function, like SSP0 functioning as mmc0-8bit. That said, the
117 In this example, group node mmc0-8bit defines a group of pins for mxs SSP0
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| /linux-4.4.14/Documentation/devicetree/bindings/clock/ |
| D | lpc1850-cgu.txt | 61 14 BASE_SSP0_CLK Base clock for SSP0
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| /linux-4.4.14/Documentation/devicetree/bindings/dma/ |
| D | ste-dma40.txt | 70 8: Synchronous Serial Port SSP0
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| /linux-4.4.14/drivers/clk/nxp/ |
| D | clk-lpc18xx-cgu.c | 236 LPC1XX_CGU_BASE_CLK(SSP0, base_common_src_ids, 0),
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