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Searched refs:SPORT3_RCLKDIV (Results 1 – 4 of 4) sorted by relevance

/linux-4.4.14/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h771 #define SPORT3_RCLKDIV 0xFFC02628 /* SPORT3 Receive Clock Divider */ macro
DcdefBF538.h364 #define bfin_read_SPORT3_RCLKDIV() bfin_read16(SPORT3_RCLKDIV)
365 #define bfin_write_SPORT3_RCLKDIV(val) bfin_write16(SPORT3_RCLKDIV, val)
/linux-4.4.14/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h1008 #define SPORT3_RCLKDIV 0xffc02628 /* SPORT3 Receive Serial Clock Divider Regis… macro
DcdefBF54x_base.h1730 #define bfin_read_SPORT3_RCLKDIV() bfin_read16(SPORT3_RCLKDIV)
1731 #define bfin_write_SPORT3_RCLKDIV(val) bfin_write16(SPORT3_RCLKDIV, val)