Searched refs:SPORT2_TCLKDIV (Results 1 - 4 of 4) sorted by relevance

/linux-4.4.14/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h308 #define bfin_read_SPORT2_TCLKDIV() bfin_read16(SPORT2_TCLKDIV)
309 #define bfin_write_SPORT2_TCLKDIV(val) bfin_write16(SPORT2_TCLKDIV, val)
H A DdefBF538.h740 #define SPORT2_TCLKDIV 0xFFC02508 /* SPORT2 Transmit Clock Divider */ macro
/linux-4.4.14/arch/blackfin/mach-bf548/include/mach/
H A DcdefBF54x_base.h1671 #define bfin_read_SPORT2_TCLKDIV() bfin_read16(SPORT2_TCLKDIV)
1672 #define bfin_write_SPORT2_TCLKDIV(val) bfin_write16(SPORT2_TCLKDIV, val)
H A DdefBF54x_base.h977 #define SPORT2_TCLKDIV 0xffc02508 /* SPORT2 Transmit Serial Clock Divider Register */ macro

Completed in 224 milliseconds