Searched refs:SPI0_IMSK_CLR (Results 1 – 2 of 2) sorted by relevance
1301 #define SPI0_IMSK_CLR 0xFFC40434 /* SPI0 Interrupt Mask Clear Register */ macro
143 #define bfin_read_SPI0_IMSK_CLR() bfin_read32(SPI0_IMSK_CLR)144 #define bfin_write_SPI0_IMSK_CLR(val) bfin_write32(SPI0_IMSK_CLR, val)