Searched refs:SOR_STATE_ASY_HSYNCPOL (Results 1 – 2 of 2) sorted by relevance
31 #define SOR_STATE_ASY_HSYNCPOL (1 << 12) macro
1505 value &= ~SOR_STATE_ASY_HSYNCPOL; in tegra_sor_edp_enable()1508 value |= SOR_STATE_ASY_HSYNCPOL; in tegra_sor_edp_enable()2050 value &= ~SOR_STATE_ASY_HSYNCPOL; in tegra_sor_hdmi_enable()2053 value |= SOR_STATE_ASY_HSYNCPOL; in tegra_sor_hdmi_enable()