Searched refs:SOR_PLL0 (Results 1 - 2 of 2) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/tegra/
H A Dsor.c769 value = tegra_sor_readl(sor, SOR_PLL0); tegra_sor_power_down()
771 tegra_sor_writel(sor, value, SOR_PLL0); tegra_sor_power_down()
884 DUMP_REG(SOR_PLL0); tegra_sor_show_regs()
1256 tegra_sor_writel(sor, value, SOR_PLL0); tegra_sor_edp_enable()
1296 value = tegra_sor_readl(sor, SOR_PLL0); tegra_sor_edp_enable()
1298 tegra_sor_writel(sor, value, SOR_PLL0); tegra_sor_edp_enable()
1319 value = tegra_sor_readl(sor, SOR_PLL0); tegra_sor_edp_enable()
1322 tegra_sor_writel(sor, value, SOR_PLL0); tegra_sor_edp_enable()
1821 value = tegra_sor_readl(sor, SOR_PLL0); tegra_sor_hdmi_enable()
1824 tegra_sor_writel(sor, value, SOR_PLL0); tegra_sor_hdmi_enable()
1970 value = tegra_sor_readl(sor, SOR_PLL0); tegra_sor_hdmi_enable()
1975 tegra_sor_writel(sor, value, SOR_PLL0); tegra_sor_hdmi_enable()
H A Dsor.h86 #define SOR_PLL0 0x17 macro

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