Searched refs:SOCFPGA_PLL_DIVQ_SHIFT (Results 1 - 2 of 2) sorted by relevance

/linux-4.4.14/drivers/clk/socfpga/
H A Dclk-pll-a10.c35 #define SOCFPGA_PLL_DIVQ_SHIFT 16 macro
55 divq = (reg & SOCFPGA_PLL_DIVQ_MASK) >> SOCFPGA_PLL_DIVQ_SHIFT; clk_pll_recalc_rate()
H A Dclk-pll.c39 #define SOCFPGA_PLL_DIVQ_SHIFT 16 macro
62 divq = (reg & SOCFPGA_PLL_DIVQ_MASK) >> SOCFPGA_PLL_DIVQ_SHIFT; clk_pll_recalc_rate()

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