Searched refs:SH_ICR (Results 1 – 1 of 1) sorted by relevance
65 #define SH_ICR 0x70 /* 64 bits */ macro439 edma_shadow0_write_array(ecc, SH_ICR, channel >> 5, in edma_setup_interrupt()617 edma_shadow0_write_array(ecc, SH_ICR, j, mask); in edma_stop()1436 edma_shadow0_write_array(ecc, SH_ICR, bank, BIT(slot)); in dma_irq_handler()