Searched refs:SD_VPCLK0_CTL (Results 1 – 9 of 9) sorted by relevance
| /linux-4.4.14/drivers/staging/rts5208/ |
| D | rtsx_card.c | 688 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL, in switch_ssc_clock()
690 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL, in switch_ssc_clock()
805 retval = rtsx_write_register(chip, SD_VPCLK0_CTL, in switch_normal_clock()
832 retval = rtsx_write_register(chip, SD_VPCLK0_CTL, in switch_normal_clock()
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| D | rtsx_card.h | 799 #define SD_VPCLK0_CTL 0xFC2A macro
803 #define SD_VPTX_CTL SD_VPCLK0_CTL
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| D | sd.c | 938 retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
944 retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
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| /linux-4.4.14/drivers/mfd/ |
| D | rtsx_usb.c | 471 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_usb_switch_clock()
473 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_usb_switch_clock()
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| D | rtsx_pcr.c | 718 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
720 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
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| /linux-4.4.14/include/linux/mfd/ |
| D | rtsx_usb.h | 226 #define SD_VPCLK0_CTL 0xFC2A macro
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| D | rtsx_pci.h | 335 #define SD_VPCLK0_CTL 0xFC2A macro
339 #define SD_VPTX_CTL SD_VPCLK0_CTL
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| /linux-4.4.14/drivers/mmc/host/ |
| D | rtsx_usb_sdmmc.c | 603 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, in sd_change_phase()
609 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0); in sd_change_phase()
610 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, in sd_change_phase()
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| D | rtsx_pci_sdmmc.c | 637 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0); in sd_change_phase()
638 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in sd_change_phase()
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