Searched refs:SDXC_CLK_50M_DDR (Results 1 – 1 of 1) sorted by relevance
216 #define SDXC_CLK_50M_DDR 3 macro675 oclk_dly = host->clk_delays[SDXC_CLK_50M_DDR].output; in sunxi_mmc_clk_set_rate()676 sclk_dly = host->clk_delays[SDXC_CLK_50M_DDR].sample; in sunxi_mmc_clk_set_rate()905 [SDXC_CLK_50M_DDR] = { .output = 60, .sample = 120 },912 [SDXC_CLK_50M_DDR] = { .output = 90, .sample = 120 },