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Searched refs:SCK (Results 1 – 11 of 11) sorted by relevance

/linux-4.4.14/arch/arm/mach-sa1100/
Dassabet.c93 #define SCK GPIO_GPIO(18) macro
98 GPSR = SCK; in adv7171_start()
107 GPSR = SCK; in adv7171_stop()
118 GPCR = SCK; in adv7171_send()
125 GPSR = SCK; in adv7171_send()
128 GPCR = SCK; in adv7171_send()
133 GPSR = SCK; in adv7171_send()
138 GPCR = SCK | SDA; in adv7171_send()
152 GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */ in adv7171_write()
153 GPDR = (GPDR | SCK | MOD) & ~SDA; in adv7171_write()
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/linux-4.4.14/Documentation/spi/
Dbutterfly32 SCK = J403.PB1/SCK = pin 2/D0
61 SCK = J403.PE4/USCK = pin 5/D3
Dspi-summary13 The three signal wires hold a clock (SCK, often on the order of 10 MHz),
61 chips described as using "three wire" signaling: SCK, data, nCSx.
496 SPI bus (shared SCK, MOSI, MISO). Valid bus numbers start at zero. On
/linux-4.4.14/Documentation/devicetree/bindings/sound/
Dfsl,esai.txt27 derive HCK, SCK and FS.
29 derive HCK, SCK and FS.
/linux-4.4.14/Documentation/devicetree/bindings/spi/
Dspi-gpio.txt8 - gpio-sck: GPIO spec for the SCK line to use
/linux-4.4.14/Documentation/devicetree/bindings/leds/
Dleds-bcm6358.txt16 - brcm,clk-div : SCK signal divider. Possible values are 1, 2, 4 and 8.
/linux-4.4.14/Documentation/zh_CN/
Dgpio.txt409 从设备延迟 SCK 的上升沿,而 I2C 主设备相应地调整其信号传输速率。
/linux-4.4.14/Documentation/gpio/
Ddrivers-on-gpio.txt57 of wires, atleast SCK and optionally MISO, MOSI and chip select lines) using
Dgpio.txt118 delays the rising edge of SCK, and the I2C master adjusts its signaling rate
Dgpio-legacy.txt438 slower clock delays the rising edge of SCK, and the I2C master adjusts its
/linux-4.4.14/drivers/spi/
DKconfig240 interface to manage MOSI, MISO, SCK, and chipselect signals. SPI