Searched refs:RXTX_REG99_MU_PHASE1_SET (Results 1 – 1 of 1) sorted by relevance
439 #define RXTX_REG99_MU_PHASE1_SET(dst, src) \ macro1092 val = RXTX_REG99_MU_PHASE1_SET(val, 0x7); in xgene_phy_sata_cfg_lanes()