Searched refs:RESTART (Results 1 – 10 of 10) sorted by relevance
31 #define RESTART 0x00000004 /* DMA Buffer Clear SYNC */ macro62 #define RESTART 0x0020 /* DMA Buffer Clear */ macro
197 dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 | in bfin_crypto_crc_config_dma()213 dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 | DMAEN | PSIZE_32; in bfin_crypto_crc_config_dma()250 dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 | DMAEN | PSIZE_32 | WDSIZE_32; in bfin_crypto_crc_config_dma()
185 dma_ch[channel].regs->cfg |= RESTART; in clear_dma_buffer()187 dma_ch[channel].regs->cfg &= ~RESTART; in clear_dma_buffer()
233 dma_config = (DMA_FLOW_STOP | RESTART | DMA2D | DI_EN_Y); in ppi_set_params()
1036 dma_config = (RESTART | WDSIZE_16 | DI_EN); in sport_send_and_recv()1047 dma_config = (RESTART | WDSIZE_16 | WNR | DI_EN); in sport_send_and_recv()
160 dma_cfg |= DMAFLOW_ARRAY | RESTART | WDSIZE_32 | DMAEN; in sdh_setup_data()
709 (DMAFLOW_AUTO | RESTART | dma_width | DI_EN); in bfin_spi_pump_transfers()727 dma_config = (RESTART | dma_width | DI_EN); in bfin_spi_pump_transfers()
516 dma_config |= DMAFLOW_STOP | RESTART | DI_EN; in adi_spi_dma_xfer()
837 unsigned short config = DMAFLOW_ARRAY | NDSIZE_5 | RESTART | WDSIZE_16 | DMAEN; in bfin_bmdma_setup()
1048 RESTART-MS := { 0 | NUMBER }