Searched refs:RESET_DMA (Results 1 – 7 of 7) sorted by relevance
48 #define RESET_DMA( n ) RESET_DMA_NUM( n ) macro
504 RESET_DMA(8); WAIT_DMA(8); in sync_serial_open()505 RESET_DMA(9); WAIT_DMA(9); in sync_serial_open()559 RESET_DMA(4); WAIT_DMA(4); in sync_serial_open()560 RESET_DMA(5); WAIT_DMA(5); in sync_serial_open()702 RESET_DMA(4); WAIT_DMA(4); in sync_serial_ioctl_unlocked()713 RESET_DMA(8); WAIT_DMA(8); in sync_serial_ioctl_unlocked()918 RESET_DMA(9); in sync_serial_ioctl_unlocked()921 RESET_DMA(5); in sync_serial_ioctl_unlocked()949 RESET_DMA(9); in sync_serial_ioctl_unlocked()952 RESET_DMA(5); in sync_serial_ioctl_unlocked()
114 #define RESET_DMA (1 << 10) macro
484 RESET_DMA(NETWORK_TX_DMA_NBR); in e100_open()485 RESET_DMA(NETWORK_RX_DMA_NBR); in e100_open()1064 RESET_DMA(NETWORK_TX_DMA_NBR); in e100_tx_timeout()1349 RESET_DMA(NETWORK_TX_DMA_NBR); in e100_close()1350 RESET_DMA(NETWORK_RX_DMA_NBR); in e100_close()
268 #define RESET_DMA 0x01 macro
307 writel(RESET_DMA, ®s->DmaReadState); in rr_reset()308 writel(RESET_DMA, ®s->DmaWriteState); in rr_reset()
243 vx_outl(chip, RESET_DMA, 0); in vx2_setup_pseudo_dma()