Searched refs:REG_CTRL (Results 1 - 11 of 11) sorted by relevance

/linux-4.4.14/drivers/video/backlight/
H A Dlm3630a_bl.c22 #define REG_CTRL 0x00 macro
93 rval |= lm3630a_update(pchip, REG_CTRL, 0x14, pdata->leda_ctrl); lm3630a_chip_init()
94 rval |= lm3630a_update(pchip, REG_CTRL, 0x0B, pdata->ledb_ctrl); lm3630a_chip_init()
131 rval = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); lm3630a_isr_func()
190 ret = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); lm3630a_bank_a_update_status()
197 ret |= lm3630a_update(pchip, REG_CTRL, LM3630A_LEDA_ENABLE, 0); lm3630a_bank_a_update_status()
199 ret |= lm3630a_update(pchip, REG_CTRL, lm3630a_bank_a_update_status()
229 rval = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); lm3630a_bank_a_get_brightness()
267 ret = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); lm3630a_bank_b_update_status()
274 ret |= lm3630a_update(pchip, REG_CTRL, LM3630A_LEDB_ENABLE, 0); lm3630a_bank_b_update_status()
276 ret |= lm3630a_update(pchip, REG_CTRL, lm3630a_bank_b_update_status()
283 dev_err(pchip->dev, "i2c failed to access REG_CTRL\n"); lm3630a_bank_b_update_status()
306 rval = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); lm3630a_bank_b_get_brightness()
/linux-4.4.14/drivers/pwm/
H A Dpwm-vt8500.c39 #define REG_CTRL(pwm) (((pwm) << 4) + 0x00) macro
125 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_config()
127 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_config()
146 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_enable()
148 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_enable()
159 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_disable()
161 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_disable()
174 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_set_polarity()
181 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_set_polarity()
/linux-4.4.14/drivers/i2c/busses/
H A Di2c-meson.c23 #define REG_CTRL 0x00 macro
141 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK, meson_i2c_set_clk_div()
226 ctrl = readl(i2c->regs + REG_CTRL); meson_i2c_irq()
282 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); meson_i2c_irq()
283 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, meson_i2c_irq()
319 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_ACK_IGNORE, flags); meson_i2c_xfer_msg()
330 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START); meson_i2c_xfer_msg()
343 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); meson_i2c_xfer_msg()
452 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); meson_i2c_probe()
H A Di2c-efm32.c20 #define REG_CTRL 0x00 macro
423 efm32_i2c_write32(ddata, REG_CTRL, REG_CTRL_EN | efm32_i2c_probe()
/linux-4.4.14/drivers/mfd/
H A Dti_am335x_tscadc.c243 tscadc_writel(tscadc, REG_CTRL, ctrl); ti_tscadc_probe()
257 tscadc_writel(tscadc, REG_CTRL, ctrl); ti_tscadc_probe()
333 tscadc_writel(tscadc_dev, REG_CTRL, ctrl); tscadc_resume()
343 tscadc_writel(tscadc_dev, REG_CTRL, ctrl); tscadc_resume()
/linux-4.4.14/drivers/video/fbdev/
H A Dxilinxfb.c58 * i.e. REG_CTRL. So this is taken care in the function
64 #define REG_CTRL 1 macro
233 xilinx_fb_out32(drvdata, REG_CTRL, drvdata->reg_ctrl_default); xilinx_fb_blank()
241 xilinx_fb_out32(drvdata, REG_CTRL, 0); xilinx_fb_blank()
313 xilinx_fb_out32(drvdata, REG_CTRL, xilinxfb_assign()
372 xilinx_fb_out32(drvdata, REG_CTRL, 0); xilinxfb_assign()
396 xilinx_fb_out32(drvdata, REG_CTRL, 0); xilinxfb_release()
/linux-4.4.14/drivers/iio/adc/
H A Dti_am335x_adc.c162 config = tiadc_readl(adc_dev, REG_CTRL); tiadc_irq_h()
164 tiadc_writel(adc_dev, REG_CTRL, config); tiadc_irq_h()
167 tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_TSCSSENB)); tiadc_irq_h()
544 idle = tiadc_readl(adc_dev, REG_CTRL); tiadc_suspend()
546 tiadc_writel(adc_dev, REG_CTRL, (idle | tiadc_suspend()
560 restore = tiadc_readl(adc_dev, REG_CTRL); tiadc_resume()
562 tiadc_writel(adc_dev, REG_CTRL, restore); tiadc_resume()
/linux-4.4.14/drivers/spi/
H A Dspi-meson-spifc.c30 #define REG_CTRL 0x08 macro
260 regmap_update_bits(spifc->regmap, REG_CTRL, CTRL_ENABLE_AHB, 0); meson_spifc_transfer_one()
270 regmap_update_bits(spifc->regmap, REG_CTRL, CTRL_ENABLE_AHB, meson_spifc_transfer_one()
H A Dspi-efm32.c25 #define REG_CTRL 0x00 macro
128 (spi->mode & SPI_CPOL ? REG_CTRL_CLKPOL : 0), REG_CTRL); efm32_spi_setup_transfer()
/linux-4.4.14/include/linux/mfd/
H A Dti_am335x_tscadc.h26 #define REG_CTRL 0x040 macro
/linux-4.4.14/drivers/regulator/
H A Dtps65023-regulator.c58 /* REG_CTRL bitfields */

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