Searched refs:REG_AXXX_CP_ME_RAM_WADDR (Results 1 – 2 of 2) sorted by relevance
265 gpu_write(gpu, REG_AXXX_CP_ME_RAM_WADDR, 0); in a3xx_hw_init()423 REG_ADRENO_DEFINE(REG_ADRENO_CP_ME_RAM_WADDR, REG_AXXX_CP_ME_RAM_WADDR),
310 #define REG_AXXX_CP_ME_RAM_WADDR 0x000001f8 macro