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Searched refs:REG_ADDR (Results 1 – 139 of 139) sorted by relevance

/linux-4.4.14/arch/cris/arch-v32/mach-fs/
Dhw_settings.S32 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg)
34 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg)
36 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg)
38 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg)
40 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0)
42 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1)
44 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing)
46 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd)
49 .dword REG_ADDR(gio, regi_gio, rw_pa_dout)
51 .dword REG_ADDR(gio, regi_gio, rw_pa_oe)
[all …]
Ddram_init.S28 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0), $r0
31 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1), $r0
68 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
72 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd), $r5
98 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
/linux-4.4.14/arch/cris/arch-v32/mach-a3/
Dhw_settings.S32 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg)
34 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency)
36 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing)
40 .dword REG_ADDR(gio, regi_gio, rw_pa_dout)
42 .dword REG_ADDR(gio, regi_gio, rw_pa_oe)
44 .dword REG_ADDR(gio, regi_gio, rw_pb_dout)
46 .dword REG_ADDR(gio, regi_gio, rw_pb_oe)
48 .dword REG_ADDR(gio, regi_gio, rw_pc_dout)
50 .dword REG_ADDR(gio, regi_gio, rw_pc_oe)
Ddram_init.S33 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0
43 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0
56 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_ctrl), $r0
74 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing), $r0
79 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency), $r0
84 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg), $r0
/linux-4.4.14/arch/cris/include/arch-v32/mach-fs/mach/
Dstartup.inc11 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
15 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
19 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
23 move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1
27 move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1
31 move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1
35 move.d REG_ADDR(gio, regi_gio, rw_pd_dout), $r1
39 move.d REG_ADDR(gio, regi_gio, rw_pd_oe), $r1
43 move.d REG_ADDR(gio, regi_gio, rw_pe_dout), $r1
47 move.d REG_ADDR(gio, regi_gio, rw_pe_oe), $r1
[all …]
/linux-4.4.14/arch/cris/include/arch-v32/mach-a3/mach/
Dstartup.inc19 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
23 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
27 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
31 move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1
35 move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1
39 move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1
43 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pa), $r1
45 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pc), $r1
52 move.d REG_ADDR(pinmux, regi_pinmux, rw_hwprot), $r1
60 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pb), $r1
[all …]
/linux-4.4.14/arch/cris/arch-v32/drivers/mach-a3/
Dnandflash.c67 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, in crisv32_hwcontrol()
71 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, in crisv32_hwcontrol()
75 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, in crisv32_hwcontrol()
146 read_cs = write_cs = (void __iomem *)REG_ADDR(pio, regi_pio, in crisv32_nand_flash_probe()
/linux-4.4.14/drivers/mfd/
Dhtc-pasic3.c29 #define REG_ADDR 5 macro
41 void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift); in pasic3_write_register()
56 void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift); in pasic3_read_register()
/linux-4.4.14/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/asm/
Diop_version_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sap_in_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sap_out_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sw_spu_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sw_cfg_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sw_cpu_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sw_mpu_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/linux-4.4.14/arch/cris/include/arch-v32/arch/hwregs/iop/asm/
Diop_version_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_scrc_in_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_scrc_out_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_trigger_grp_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_fifo_out_extra_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_crc_par_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_fifo_in_extra_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_mpu_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sap_in_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_timer_grp_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_fifo_out_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_fifo_in_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_dmc_in_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_dmc_out_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sap_out_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_spu_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sw_spu_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sw_cfg_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sw_mpu_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sw_cpu_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/linux-4.4.14/arch/cris/include/arch-v32/arch/hwregs/asm/
Dirq_nmi_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dstrcop_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dcris_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dstrmux_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dconfig_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Drt_trace_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dmarb_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
350 #ifndef REG_ADDR
351 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dtimer_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dmmu_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Data_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dbif_slave_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dgio_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Ddma_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dbif_core_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dser_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dintr_vect_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dsser_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Deth_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dbif_dma_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/linux-4.4.14/arch/cris/include/arch-v32/arch/hwregs/
Dmarb_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
333 #ifndef REG_ADDR
334 #define REG_ADDR( scope, inst, reg ) \ macro
Dirq_nmi_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dstrcop_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dconfig_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Drt_trace_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Data_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dbif_slave_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dser_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dbif_core_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Deth_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dsser_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Ddma_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dextmem_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dbif_dma_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
/linux-4.4.14/arch/cris/include/arch-v32/mach-fs/mach/hwregs/
Dmarb_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
333 #ifndef REG_ADDR
334 #define REG_ADDR( scope, inst, reg ) \ macro
Dstrmux_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dconfig_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dtimer_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dintr_vect_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dbif_slave_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dgio_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dbif_core_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dpinmux_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dbif_dma_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
/linux-4.4.14/arch/cris/include/arch-v32/mach-a3/mach/hwregs/
Dmarb_bar_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
355 #ifndef REG_ADDR
356 #define REG_ADDR( scope, inst, reg ) \ macro
Dstrmux_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Dl2cache_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Dclkgen_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Dmarb_foo_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
481 #ifndef REG_ADDR
482 #define REG_ADDR( scope, inst, reg ) \ macro
Dtimer_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Dddr2_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Dpinmux_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Dpio_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Dintr_vect_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Dgio_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
/linux-4.4.14/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/
Diop_version_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_sap_in_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_sap_out_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_sw_spu_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_sw_cpu_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_sw_mpu_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_sw_cfg_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
/linux-4.4.14/arch/cris/include/arch-v32/arch/hwregs/iop/
Diop_version_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_scrc_in_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_scrc_out_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_trigger_grp_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_fifo_in_extra_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_fifo_out_extra_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_sap_in_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_mpu_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_crc_par_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_fifo_in_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_timer_grp_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_fifo_out_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_sap_out_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_dmc_out_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_dmc_in_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_spu_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_sw_spu_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_sw_cpu_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_sw_mpu_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Diop_sw_cfg_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
/linux-4.4.14/arch/cris/include/arch-v32/mach-fs/mach/hwregs/asm/
Dconfig_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dtimer_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dgio_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dbif_core_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dpinmux_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/linux-4.4.14/drivers/net/ethernet/qlogic/qed/
Dqed.h475 #define REG_ADDR(cdev, offset) (void __iomem *)((u8 __iomem *)\ macro
479 #define REG_RD(cdev, offset) readl(REG_ADDR(cdev, offset))
480 #define REG_WR(cdev, offset, val) writel((u32)val, REG_ADDR(cdev, offset))
481 #define REG_WR16(cdev, offset, val) writew((u16)val, REG_ADDR(cdev, offset))
Dqed_hw.c244 reg_addr = (u32 __iomem *)REG_ADDR(p_hwfn, hw_offset); in qed_memcpy_hw()
/linux-4.4.14/arch/cris/include/arch-v32/mach-a3/mach/hwregs/asm/
Dclkgen_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dtimer_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dddr2_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dpio_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dpinmux_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dgio_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/linux-4.4.14/drivers/net/ethernet/apm/xgene/
Dxgene_enet_sgmac.h25 #define REG_ADDR(src) ((src) & GENMASK(4, 0)) macro
Dxgene_enet_sgmac.c165 addr = PHY_ADDR(phy_id) | REG_ADDR(reg); in xgene_mii_phy_write()
186 addr = PHY_ADDR(phy_id) | REG_ADDR(reg); in xgene_mii_phy_read()
/linux-4.4.14/drivers/net/ethernet/chelsio/cxgb/
Dmy3126.c34 #define OFFSET(REG_ADDR) (REG_ADDR << 2) argument
Dpm3393.c48 #define OFFSET(REG_ADDR) ((REG_ADDR) << 2) argument
/linux-4.4.14/drivers/hwmon/
Dultra45_env.c35 #define REG_ADDR 0x41UL macro
72 writeb(ireg, p->regs + REG_ADDR); in env_read()
82 writeb(ireg, p->regs + REG_ADDR); in env_write()
/linux-4.4.14/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x.h163 #define REG_ADDR(bp, offset) ((bp->regview) + (offset)) macro
165 #define REG_RD(bp, offset) readl(REG_ADDR(bp, offset))
166 #define REG_RD8(bp, offset) readb(REG_ADDR(bp, offset))
167 #define REG_RD16(bp, offset) readw(REG_ADDR(bp, offset))
169 #define REG_WR(bp, offset, val) writel((u32)val, REG_ADDR(bp, offset))
170 #define REG_WR8(bp, offset, val) writeb((u8)val, REG_ADDR(bp, offset))
171 #define REG_WR16(bp, offset, val) writew((u16)val, REG_ADDR(bp, offset))
Dbnx2x_vfpf.c144 REG_ADDR(bp, PXP_VF_ADDR_CSDM_GLOBAL_START); in bnx2x_send_msg2pf()
/linux-4.4.14/drivers/spi/
Dspi-meson-spifc.c29 #define REG_ADDR 0x04 macro
/linux-4.4.14/drivers/gpu/drm/exynos/
Dexynos_drm_dsi.c212 #define REG_ADDR(dsi, reg_idx) ((dsi)->reg_base + \ macro
215 REG_ADDR((dsi), (reg_idx)))
216 #define DSI_READ(dsi, reg_idx) readl(REG_ADDR((dsi), (reg_idx)))
/linux-4.4.14/arch/cris/arch-v32/kernel/
Dentry.S406 move.d REG_ADDR(intr_vect, regi_irq, r_nmi), $r0