Searched refs:RD0 (Results 1 – 3 of 3) sorted by relevance
117 RD0, /* reg in displacement in bits 0-3 */ enumerator610 case RD0: in misalignment_addr()720 case RD0: in misalignment_reg()
1480 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* TWD2, conflicts with RD0 and PWML1 */1746 AT91_PIOB 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD0 */
760 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */