Searched refs:PPLL_DIV_0 (Results 1 – 5 of 5) sorted by relevance
244 #define PPLL_DIV_0 0x0004 macro
431 #define PPLL_DIV_0 0x0004 macro
667 ppll_divn = INPLL(PPLL_DIV_0 + ppll_div_sel); in radeon_fixup_panel_info()
654 n = (INPLL(PPLL_DIV_0 + ppll_div_sel) & 0x7ff); in radeon_probe_pll_params()660 switch ((INPLL(PPLL_DIV_0 + ppll_div_sel) >> 16) & 0x7) { in radeon_probe_pll_params()
2464 OUTPLL(PPLL_DIV_0, 0x48090);