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Searched refs:PORT_SCR_CTL (Results 1 – 5 of 5) sorted by relevance

/linux-4.4.14/drivers/phy/
Dphy-berlin-sata.c21 #define PORT_SCR_CTL 0x2c macro
124 regval = readl(ctrl_reg + PORT_SCR_CTL); in phy_berlin_sata_power_on()
127 writel(regval, ctrl_reg + PORT_SCR_CTL); in phy_berlin_sata_power_on()
/linux-4.4.14/drivers/ata/
Dahci_ceva.c157 writel(tmp, mmio + PORT_SCR_CTL + PORT_BASE + PORT_OFFSET * i); in ahci_ceva_setup()
Dahci.h139 PORT_SCR_CTL = 0x2c, /* SATA phy register: SControl */ enumerator
Dlibahci.c543 [SCR_CONTROL] = PORT_SCR_CTL, in ahci_scr_offset()
757 scontrol = readl(port_mmio + PORT_SCR_CTL); in ahci_power_down()
759 writel(scontrol, port_mmio + PORT_SCR_CTL); in ahci_power_down()
/linux-4.4.14/drivers/block/mtip32xx/
Dmtip32xx.c487 writel(readl(port->mmio + PORT_SCR_CTL) | in mtip_restart_port()
488 1, port->mmio + PORT_SCR_CTL); in mtip_restart_port()
489 readl(port->mmio + PORT_SCR_CTL); in mtip_restart_port()
500 writel(readl(port->mmio + PORT_SCR_CTL) & ~1, in mtip_restart_port()
501 port->mmio + PORT_SCR_CTL); in mtip_restart_port()
502 readl(port->mmio + PORT_SCR_CTL); in mtip_restart_port()