Searched refs:PORT_CLK_SEL_SPLL (Results 1 – 4 of 4) sorted by relevance
262 pipe_config->ddi_pll_sel = PORT_CLK_SEL_SPLL; in intel_crt_compute_config()
639 WARN_ON(intel_crtc->config->ddi_pll_sel != PORT_CLK_SEL_SPLL); in hsw_fdi_link_train()1128 case PORT_CLK_SEL_SPLL: in hsw_ddi_clock_get()1297 } else if (crtc_state->ddi_pll_sel == PORT_CLK_SEL_SPLL) { in hsw_ddi_pll_select()
7345 #define PORT_CLK_SEL_SPLL (3<<29) macro
9798 case PORT_CLK_SEL_SPLL: in haswell_get_ddi_pll()